[llvm] [AMDGPU] Remove implicit defs on expanded mov64 pseudos (PR #190379)
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Fri Apr 3 11:07:29 PDT 2026
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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->
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<details>
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You can test this locally with the following command:
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp --diff_from_common_commit
``````````
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index aaabcb71f..3179c6534 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -2209,9 +2209,9 @@ bool SIInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
.addImm(0); // clamp
} else {
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo)
- .addImm(Lo.getSExtValue());
+ .addImm(Lo.getSExtValue());
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi)
- .addImm(Hi.getSExtValue());
+ .addImm(Hi.getSExtValue());
}
} else {
assert(SrcOp.isReg());
@@ -2229,9 +2229,9 @@ bool SIInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
.addImm(0); // clamp
} else {
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo)
- .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub0));
+ .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub0));
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi)
- .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub1));
+ .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub1));
}
}
MI.eraseFromParent();
@@ -2263,9 +2263,9 @@ bool SIInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
APInt Lo(32, Imm.getLoBits(32).getZExtValue());
APInt Hi(32, Imm.getHiBits(32).getZExtValue());
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DstLo)
- .addImm(Lo.getSExtValue());
+ .addImm(Lo.getSExtValue());
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DstHi)
- .addImm(Hi.getSExtValue());
+ .addImm(Hi.getSExtValue());
MI.eraseFromParent();
break;
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/190379
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