[llvm] [RISCV] Remove codegen for VP float rounding intrinsics (PR #189896)

Luke Lau via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 1 03:31:58 PDT 2026

Previous message: [llvm] [RISCV] Remove codegen for VP float rounding intrinsics (PR #189896)
Next message: [llvm] [BOLT] Optimize the codegen of createLoadImmediate for AArch64. (PR #137413)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

https://github.com/lukel97 auto_merge_enabled https://github.com/llvm/llvm-project/pull/189896

Previous message: [llvm] [RISCV] Remove codegen for VP float rounding intrinsics (PR #189896)
Next message: [llvm] [BOLT] Optimize the codegen of createLoadImmediate for AArch64. (PR #137413)
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list