[llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)
Dominik Steenken via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 1 02:49:35 PDT 2026
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@@ -295,14 +295,39 @@ RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
Register RegScavenger::scavengeRegisterBackwards(const TargetRegisterClass &RC,
MachineBasicBlock::iterator To,
bool RestoreAfter, int SPAdj,
- bool AllowSpill) {
+ bool AllowSpill,
+ bool InspectNext) {
const MachineBasicBlock &MBB = *To->getParent();
const MachineFunction &MF = *MBB.getParent();
+ // Obtain a list of candidate registers in allocation order of RC.
+ // If the instruction at MBBI has any early-clobber def regs, we must exclude
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dominik-steenken wrote:
Updated to mention `InspectNext`.
https://github.com/llvm/llvm-project/pull/184814
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