[llvm] [AMDGPU] Allow allocation of lo128 registers from all banks (PR #172614)

[Stanislav Mekhanoshin via llvm-commits]

rampitec wrote:

> > create a register class with holes punched in it: [0-127, 256-383, 512-639, 768-895]
> 
> I'd still rather try to do this. Alternatively, could you represent this as 4 register classes, rather than 1 with holes? Then you would at least get the generated fast contains check without doing is_contained everywhere

It's a fundamental thing. The moment you combine these 4 classes into 1 allocatable, it becomes fractured, because td just collects its register members. And here tablegen just explodes and finally killed by the OOM killer. After few hours.



https://github.com/llvm/llvm-project/pull/172614