[llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)

[Florian Hahn via llvm-commits]

================
@@ -896,6 +909,133 @@ void EarlyIfConverter::invalidateTraces() {
   Traces->verifyAnalysis();
 }
 
+/// Check if a register's value comes from a memory load by walking the
+/// def-use chain. We want to prioritize converting branches which
+/// depend on values loaded from memory (unless they are loop invariant,
+/// or come from a constant pool).
+/// Results are cached for virtual registers only.
+bool EarlyIfConverter::doOperandsComeFromMemory(Register Reg) {
+  if (!Reg.isVirtual())
+    return false;
+
+  // Check cache first.
+  auto It = OperandMemoryCache.find(Reg);
+  if (It != OperandMemoryCache.end())
+    return It->second;
+
+  // Walk the def-use chain.
+  SmallPtrSet<const MachineInstr *, 8> Visited;
+  SmallVector<const MachineInstr *> Worklist;
+  SmallVector<Register, 16> VisitedRegs;
+
+  MachineInstr *DefMI = MRI->getVRegDef(Reg);
+  // The operand is defined outside of the function - it does not
+  // come from memory access.
+  if (!DefMI) {
+    OperandMemoryCache[Reg] = false;
+    return false;
+  }
+
+  Worklist.push_back(DefMI);
+  VisitedRegs.push_back(Reg);
+
+  while (!Worklist.empty()) {
+    const MachineInstr *MI = Worklist.pop_back_val();
+    if (!Visited.insert(MI).second)
+      continue;
+
+    // Check if this instruction is a load.
+    if (MI->mayLoad()) {
+      LLVM_DEBUG(dbgs() << "Operand comes from load: " << *MI);
+      // Check if the load is from a constant pool
+      bool IsConstantPoolLoad = false;
+      for (const auto &MOp : MI->memoperands()) {
+        if (const PseudoSourceValue *PSV = MOp->getPseudoValue())
+          if (PSV->isConstantPool()) {
+            LLVM_DEBUG(dbgs() << "Found constant pool load!\n");
+            IsConstantPoolLoad = true;
+          }
+        // Cache all visited virtual registers as coming from memory.
+        for (Register Reg : VisitedRegs)
+          OperandMemoryCache[Reg] = !IsConstantPoolLoad;
+        return !IsConstantPoolLoad;
+      }
+    }
+
+    // Walk through all register use operands and find their definitions.
+    for (const MachineOperand &MO : MI->operands()) {
+      if (!MO.isReg() || !MO.isUse())
+        continue;
+      Register UseReg = MO.getReg();
+      if (!UseReg.isVirtual())
+        continue;
+
+      // Check cache for this operand.
+      auto CacheIt = OperandMemoryCache.find(UseReg);
+      if (CacheIt != OperandMemoryCache.end()) {
+        if (CacheIt->second) {
+          for (Register Reg : VisitedRegs)
+            OperandMemoryCache[Reg] = true;
+          return true;
+        }
+        continue;
+      }
+
+      if (MachineInstr *UseDef = MRI->getVRegDef(UseReg)) {
+        if (!Visited.count(UseDef)) {
+          Worklist.push_back(UseDef);
+          VisitedRegs.push_back(UseReg);
+        }
+      }
+    }
+  }
+
+  // No load found, cache all visited virtual registers as not from memory.
+  for (Register Reg : VisitedRegs)
+    OperandMemoryCache[Reg] = false;
+  return false;
+}
+
+/// Check if the branch condition is data-dependent (comes from memory loads).
+bool EarlyIfConverter::isConditionDataDependent() {
+  TargetInstrInfo::MachineBranchPredicate MBP;
+  if (TII->analyzeBranchPredicate(*IfConv.Head, MBP, /*AllowModify=*/false))
+    return false;
+
+  if (!MBP.ConditionDef)
+    return false;
+
+  // Check if ConditionDef itself is a load (e.g., CBZ with loaded value).
+  if (MBP.ConditionDef->mayLoad()) {
+    // Check if it's a constant pool load. In that case treat it as predictable
+    // since the branch does not depend on potentially random data.
+    bool IsConstantPoolLoad = false;
+    for (const auto &MOp : MBP.ConditionDef->memoperands()) {
+      if (const PseudoSourceValue *PSV = MOp->getPseudoValue())
+        if (PSV->isConstantPool())
+          IsConstantPoolLoad = true;
----------------
fhahn wrote:

Do we have a test covering this code here?

https://github.com/llvm/llvm-project/pull/174457