[llvm] [RISCV] Assign separate latencies for vector COPYs in SpacemitX60 scheduling model (PR #172556)

[Pengcheng Wang via llvm-commits]

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@@ -5190,3 +5190,27 @@ bool RISCVInstrInfo::isHighLatencyDef(int Opc) const {
     return true;
   }
 }
+
+bool RISCVInstrInfo::isVRegCopy(const MachineInstr *MI, unsigned LMul) const {
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wangpc-pp wrote:

What is the difference between this `isVRegCopy` and that `isVectorCopy` in `llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp`?

https://github.com/llvm/llvm-project/pull/172556