[llvm] [X86][GlobalIsel] Reland G_ISFPCLASS (PR #165848)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 14 02:55:11 PST 2025
https://github.com/mahesh-attarde updated https://github.com/llvm/llvm-project/pull/165848
>From daa40d0e09550919598aa8e0af0eb29fd01051bb Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Fri, 31 Oct 2025 02:20:12 -0700
Subject: [PATCH 1/5] [X86][GlobalIsel] Reland G_ISFPCLASS
---
.../CodeGen/GlobalISel/InstructionSelect.cpp | 10 +
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 2 +
llvm/test/CodeGen/X86/isel-fpclass.ll | 461 +++++++++++-------
3 files changed, 310 insertions(+), 163 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index 2dd22c8a7e8ba..5a499a92d75ac 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -238,6 +238,7 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
continue;
}
// Try to find redundant copies b/w vregs of the same register class.
+ // Try to constrain the register class of the copy operand.
for (auto MII = MBB.rbegin(), End = MBB.rend(); MII != End;) {
MachineInstr &MI = *MII;
++MII;
@@ -254,6 +255,15 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
MI.eraseFromParent();
}
}
+ auto CopyOpd = MI.getOperand(1);
+ if (CopyOpd.getSubReg() != 0) {
+ auto VReg = CopyOpd.getReg();
+ const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
+ const TargetRegisterClass *RC = TRI.getSubClassWithSubReg(
+ MRI.getRegClass(VReg), CopyOpd.getSubReg());
+ MRI.constrainRegClass(
+ VReg, RC); // 3rd Arg MinRCSize in DAG is 4, we used 0 here.
+ }
}
}
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index e792b1bce3c5c..32b81e36a5126 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -590,6 +590,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.lower();
// fp intrinsics
+ getActionDefinitionsBuilder(G_IS_FPCLASS).lower();
+
getActionDefinitionsBuilder({G_INTRINSIC_ROUNDEVEN, G_INTRINSIC_TRUNC})
.scalarize(0)
.minScalar(0, LLT::scalar(32))
diff --git a/llvm/test/CodeGen/X86/isel-fpclass.ll b/llvm/test/CodeGen/X86/isel-fpclass.ll
index df04b673d8223..c7c54a74f5f87 100644
--- a/llvm/test/CodeGen/X86/isel-fpclass.ll
+++ b/llvm/test/CodeGen/X86/isel-fpclass.ll
@@ -1,11 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86,X86-SDAGISEL
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefixes=X64,X64-SDAGISEL
; RUN: llc < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
; RUN: llc < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
-; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X64,X64-GISEL
-
+; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X86,X86-GISEL
+; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64-GISEL
define i1 @isnone_f(float %x) nounwind {
; X86-LABEL: isnone_f:
; X86: # %bb.0: # %entry
@@ -51,27 +50,16 @@ entry:
}
define i1 @issignaling_f(float %x) nounwind {
-; X86-LABEL: issignaling_f:
-; X86: # %bb.0:
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-NEXT: setl %cl
-; X86-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
-; X86-NEXT: setge %al
-; X86-NEXT: andb %cl, %al
-; X86-NEXT: retl
-;
-; X64-LABEL: issignaling_f:
-; X64: # %bb.0:
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-NEXT: setl %cl
-; X64-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
-; X64-NEXT: setge %al
-; X64-NEXT: andb %cl, %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: issignaling_f:
+; X64-SDAGISEL: # %bb.0:
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-SDAGISEL-NEXT: setl %cl
+; X64-SDAGISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X64-SDAGISEL-NEXT: setge %al
+; X64-SDAGISEL-NEXT: andb %cl, %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: issignaling_f:
; X86-FASTISEL: # %bb.0:
@@ -87,26 +75,42 @@ define i1 @issignaling_f(float %x) nounwind {
; X86-FASTISEL-NEXT: andb %cl, %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: issignaling_f:
+; X64-FASTISEL: # %bb.0:
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-FASTISEL-NEXT: setl %cl
+; X64-FASTISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X64-FASTISEL-NEXT: setge %al
+; X64-FASTISEL-NEXT: andb %cl, %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: issignaling_f:
+; X64-GISEL: # %bb.0:
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %dl
+; X64-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: andb %dl, %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
%a0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1) ; "snan"
ret i1 %a0
}
define i1 @isquiet_f(float %x) nounwind {
-; X86-LABEL: isquiet_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-NEXT: setge %al
-; X86-NEXT: retl
-;
-; X64-LABEL: isquiet_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-NEXT: setge %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: isquiet_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-SDAGISEL-NEXT: setge %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: isquiet_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -119,27 +123,37 @@ define i1 @issignaling_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setge %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: isquiet_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-FASTISEL-NEXT: setge %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: isquiet_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-GISEL-NEXT: setae %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 2) ; "qnan"
ret i1 %0
}
define i1 @not_isquiet_f(float %x) nounwind {
-; X86-LABEL: not_isquiet_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-NEXT: setl %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_isquiet_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-NEXT: setl %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_isquiet_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-SDAGISEL-NEXT: setl %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isquiet_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -152,27 +166,46 @@ define i1 @not_isquiet_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setl %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_isquiet_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-FASTISEL-NEXT: setl %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_isquiet_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %dl
+; X64-GISEL-NEXT: orb %cl, %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %cl
+; X64-GISEL-NEXT: orb %dl, %cl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %dl
+; X64-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: andb %dl, %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1021) ; ~"qnan"
ret i1 %0
}
define i1 @isinf_f(float %x) nounwind {
-; X86-LABEL: isinf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: sete %al
-; X86-NEXT: retl
-;
-; X64-LABEL: isinf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: isinf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: sete %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: isinf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -185,27 +218,37 @@ define i1 @isinf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: sete %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: isinf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: sete %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: isinf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf"
ret i1 %0
}
define i1 @not_isinf_f(float %x) nounwind {
-; X86-LABEL: not_isinf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: setne %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_isinf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setne %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_isinf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setne %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isinf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -218,24 +261,39 @@ define i1 @not_isinf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setne %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_isinf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setne %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_isinf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %dl
+; X64-GISEL-NEXT: orb %cl, %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %al
+; X64-GISEL-NEXT: orb %dl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 507) ; ~0x204 = "~inf"
ret i1 %0
}
define i1 @is_plus_inf_f(float %x) nounwind {
-; X86-LABEL: is_plus_inf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-NEXT: sete %al
-; X86-NEXT: retl
-;
-; X64-LABEL: is_plus_inf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: is_plus_inf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: sete %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: is_plus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -246,24 +304,34 @@ define i1 @is_plus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: sete %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: is_plus_inf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: sete %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: is_plus_inf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 512) ; 0x200 = "+inf"
ret i1 %0
}
define i1 @is_minus_inf_f(float %x) nounwind {
-; X86-LABEL: is_minus_inf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
-; X86-NEXT: sete %al
-; X86-NEXT: retl
-;
-; X64-LABEL: is_minus_inf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: is_minus_inf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-SDAGISEL-NEXT: sete %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: is_minus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -274,24 +342,34 @@ define i1 @is_minus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: sete %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: is_minus_inf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-FASTISEL-NEXT: sete %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: is_minus_inf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-GISEL-NEXT: sete %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 4) ; "-inf"
ret i1 %0
}
define i1 @not_is_minus_inf_f(float %x) nounwind {
-; X86-LABEL: not_is_minus_inf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
-; X86-NEXT: setne %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_is_minus_inf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-NEXT: setne %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_is_minus_inf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-SDAGISEL-NEXT: setne %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_is_minus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -302,27 +380,43 @@ define i1 @not_is_minus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setne %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_is_minus_inf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-FASTISEL-NEXT: setne %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_is_minus_inf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: movl %eax, %ecx
+; X64-GISEL-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %edx, %edx
+; X64-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %sil
+; X64-GISEL-NEXT: orb %dl, %sil
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %al
+; X64-GISEL-NEXT: orb %dl, %al
+; X64-GISEL-NEXT: orb %sil, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1019) ; ~"-inf"
ret i1 %0
}
define i1 @isfinite_f(float %x) nounwind {
-; X86-LABEL: isfinite_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: setl %al
-; X86-NEXT: retl
-;
-; X64-LABEL: isfinite_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setl %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: isfinite_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setl %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: isfinite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -335,27 +429,37 @@ define i1 @isfinite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setl %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: isfinite_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setl %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: isfinite_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"
ret i1 %0
}
define i1 @not_isfinite_f(float %x) nounwind {
-; X86-LABEL: not_isfinite_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: setge %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_isfinite_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setge %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_isfinite_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setge %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isfinite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -368,24 +472,39 @@ define i1 @not_isfinite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setge %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_isfinite_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setge %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_isfinite_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %dl
+; X64-GISEL-NEXT: orb %cl, %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %al
+; X64-GISEL-NEXT: orb %dl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; ~0x1f8 = "~finite"
ret i1 %0
}
define i1 @is_plus_finite_f(float %x) nounwind {
-; X86-LABEL: is_plus_finite_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-NEXT: setb %al
-; X86-NEXT: retl
-;
-; X64-LABEL: is_plus_finite_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setb %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: is_plus_finite_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setb %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: is_plus_finite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -396,6 +515,22 @@ define i1 @is_plus_finite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setb %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: is_plus_finite_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setb %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: is_plus_finite_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 448) ; 0x1c0 = "+finite"
ret i1 %0
>From 13f54782ee11a58909fc687df2138004ba66faa3 Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Fri, 31 Oct 2025 02:30:30 -0700
Subject: [PATCH 2/5] undo clangformat
---
llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index 5a499a92d75ac..ac6d5653e13cf 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -261,8 +261,7 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
const TargetRegisterClass *RC = TRI.getSubClassWithSubReg(
MRI.getRegClass(VReg), CopyOpd.getSubReg());
- MRI.constrainRegClass(
- VReg, RC); // 3rd Arg MinRCSize in DAG is 4, we used 0 here.
+ MRI.constrainRegClass(VReg, RC);
}
}
}
>From 9882bd1972dbefc5f0efe2b58396ec7b246a5050 Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Wed, 10 Dec 2025 01:32:53 -0800
Subject: [PATCH 3/5] update fixup after isel
---
llvm/lib/Target/X86/CMakeLists.txt | 1 +
.../lib/Target/X86/GISel/X86PostIselFixup.cpp | 71 ++++++
llvm/lib/Target/X86/X86.h | 7 +-
llvm/lib/Target/X86/X86TargetMachine.cpp | 5 +-
llvm/test/CodeGen/X86/isel-fpclass.ll | 216 +++++++++++++++++-
5 files changed, 297 insertions(+), 3 deletions(-)
create mode 100644 llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp
diff --git a/llvm/lib/Target/X86/CMakeLists.txt b/llvm/lib/Target/X86/CMakeLists.txt
index f9bd233cf8ecf..4f37b048fef94 100644
--- a/llvm/lib/Target/X86/CMakeLists.txt
+++ b/llvm/lib/Target/X86/CMakeLists.txt
@@ -88,6 +88,7 @@ set(sources
X86InsertWait.cpp
GISel/X86CallLowering.cpp
GISel/X86InstructionSelector.cpp
+ GISel/X86PostIselFixup.cpp
GISel/X86LegalizerInfo.cpp
GISel/X86RegisterBankInfo.cpp
)
diff --git a/llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp b/llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp
new file mode 100644
index 0000000000000..d8271c584f801
--- /dev/null
+++ b/llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp
@@ -0,0 +1,71 @@
+//===- X86InstructionSelector.cpp -----------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file implements the fixup after instruction selection for
+/// X86.
+//===----------------------------------------------------------------------===//
+
+#include "X86.h"
+#include "X86InstrBuilder.h"
+#include "X86RegisterBankInfo.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Pass.h"
+
+#define DEBUG_TYPE "X86-post-isel-fixup"
+
+using namespace llvm;
+/* Motivation:
+ After DAGISEL, InstrEmitter emits Sub_Reg Node by applying constraint on
+ register classes. e.g. GR32 defination with subreg_8bit adds constrainting
+ register class GR32_ABCD.
+ With GISEL, this fixup needs to be after ISEL, before verifier.
+ */
+namespace {
+class X86PostIselFixup : public MachineFunctionPass {
+public:
+ static char ID;
+ X86PostIselFixup() : MachineFunctionPass(ID) {}
+
+ StringRef getPassName() const override { return "X86 Post ISel Fixup"; }
+
+ bool runOnMachineFunction(MachineFunction &MF) override {
+ LLVM_DEBUG(dbgs() << "Running X86 Post ISel Fixup on function: "
+ << MF.getName() << "\n");
+ const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
+ MachineRegisterInfo &MRI = MF.getRegInfo();
+ bool Changed = false;
+ for (auto &MBB : MF) {
+ for (auto &MI : MBB) {
+ if (MI.getOpcode() == TargetOpcode::COPY) {
+ LLVM_DEBUG(dbgs() << "Reg Constraint Fixup: "; MI.dump());
+ auto CopyOpd = MI.getOperand(1);
+ if (CopyOpd.getSubReg() != 0) {
+ auto VReg = CopyOpd.getReg();
+ const TargetRegisterClass *RC = TRI.getSubClassWithSubReg(
+ MRI.getRegClass(VReg), CopyOpd.getSubReg());
+ MRI.constrainRegClass(VReg, RC);
+ Changed |= true;
+ }
+ }
+ }
+ }
+ return Changed;
+ }
+};
+
+} // end anonymous namespace
+
+char X86PostIselFixup::ID = 0;
+
+INITIALIZE_PASS(X86PostIselFixup, DEBUG_TYPE, "X86 Post ISel Fixup", false,
+ false)
+
+FunctionPass *llvm::createX86PostIselFixupPass() {
+ return new X86PostIselFixup();
+}
\ No newline at end of file
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 6261fadf10a7a..bc42a1c38c410 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -152,6 +152,11 @@ FunctionPass *createX86InsertPrefetchPass();
/// fp exceptions when strict-fp enabled.
FunctionPass *createX86InsertX87waitPass();
+/// This pass fixes post-isel constraints, such as register constraints for
+/// Sub registers. Ideally Tablgen GISel would handle most of constraints, since
+/// some parts of X86 are handled manually/imported from DAG, we need pass to fix.
+FunctionPass * createX86PostIselFixupPass();
+
/// This pass optimizes arithmetic based on knowledge that is only used by
/// a reduction sequence and is therefore safe to reassociate in interesting
/// ways.
@@ -207,7 +212,7 @@ void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);
void initializeX86TileConfigPass(PassRegistry &);
void initializeX86SuppressAPXForRelocationPassPass(PassRegistry &);
void initializeX86WinEHUnwindV2Pass(PassRegistry &);
-
+void initializeX86PostIselFixupPass(PassRegistry &);
namespace X86AS {
enum : unsigned {
GS = 256,
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 8dd6f3d97ccea..65ce56fc4e080 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -483,8 +483,11 @@ bool X86PassConfig::addRegBankSelect() {
bool X86PassConfig::addGlobalInstructionSelect() {
addPass(new InstructionSelect(getOptLevel()));
// Add GlobalBaseReg in case there is no SelectionDAG passes afterwards
- if (isGlobalISelAbortEnabled())
+ if (isGlobalISelAbortEnabled()) {
addPass(createX86GlobalBaseRegPass());
+ // Fixup must run before verifier after isel.
+ addPass(createX86PostIselFixupPass());
+ }
return false;
}
diff --git a/llvm/test/CodeGen/X86/isel-fpclass.ll b/llvm/test/CodeGen/X86/isel-fpclass.ll
index c7c54a74f5f87..6d8457c8765b7 100644
--- a/llvm/test/CodeGen/X86/isel-fpclass.ll
+++ b/llvm/test/CodeGen/X86/isel-fpclass.ll
@@ -4,7 +4,7 @@
; RUN: llc < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
; RUN: llc < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X86,X86-GISEL
-; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64-GISEL
+; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-GISEL
define i1 @isnone_f(float %x) nounwind {
; X86-LABEL: isnone_f:
; X86: # %bb.0: # %entry
@@ -50,6 +50,17 @@ entry:
}
define i1 @issignaling_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: issignaling_f:
+; X86-SDAGISEL: # %bb.0:
+; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-SDAGISEL-NEXT: setl %cl
+; X86-SDAGISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X86-SDAGISEL-NEXT: setge %al
+; X86-SDAGISEL-NEXT: andb %cl, %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: issignaling_f:
; X64-SDAGISEL: # %bb.0:
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -87,6 +98,19 @@ define i1 @issignaling_f(float %x) nounwind {
; X64-FASTISEL-NEXT: andb %cl, %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: issignaling_f:
+; X86-GISEL: # %bb.0:
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: seta %dl
+; X86-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-GISEL-NEXT: setb %al
+; X86-GISEL-NEXT: andb %dl, %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: issignaling_f:
; X64-GISEL: # %bb.0:
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -104,6 +128,14 @@ define i1 @issignaling_f(float %x) nounwind {
}
define i1 @isquiet_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: isquiet_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-SDAGISEL-NEXT: setge %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: isquiet_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -132,6 +164,16 @@ define i1 @issignaling_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setge %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: isquiet_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-GISEL-NEXT: setae %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: isquiet_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -147,6 +189,14 @@ define i1 @issignaling_f(float %x) nounwind {
}
define i1 @not_isquiet_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: not_isquiet_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-SDAGISEL-NEXT: setl %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: not_isquiet_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -175,6 +225,25 @@ define i1 @not_isquiet_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setl %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: not_isquiet_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: setb %dl
+; X86-GISEL-NEXT: orb %cl, %dl
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: sete %cl
+; X86-GISEL-NEXT: orb %dl, %cl
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: seta %dl
+; X86-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-GISEL-NEXT: setb %al
+; X86-GISEL-NEXT: andb %dl, %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: not_isquiet_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -199,6 +268,14 @@ entry:
}
define i1 @isinf_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: isinf_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-SDAGISEL-NEXT: sete %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: isinf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -227,6 +304,16 @@ define i1 @isinf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: sete %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: isinf_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: sete %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: isinf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -242,6 +329,14 @@ entry:
}
define i1 @not_isinf_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: not_isinf_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-SDAGISEL-NEXT: setne %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: not_isinf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -270,6 +365,19 @@ define i1 @not_isinf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setne %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: not_isinf_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: setb %dl
+; X86-GISEL-NEXT: orb %cl, %dl
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: seta %al
+; X86-GISEL-NEXT: orb %dl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: not_isinf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -288,6 +396,12 @@ entry:
}
define i1 @is_plus_inf_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: is_plus_inf_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-SDAGISEL-NEXT: sete %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: is_plus_inf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -312,6 +426,14 @@ define i1 @is_plus_inf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: sete %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: is_plus_inf_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-GISEL-NEXT: sete %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: is_plus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
@@ -326,6 +448,12 @@ entry:
}
define i1 @is_minus_inf_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: is_minus_inf_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
+; X86-SDAGISEL-NEXT: sete %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: is_minus_inf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -350,6 +478,14 @@ define i1 @is_minus_inf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: sete %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: is_minus_inf_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
+; X86-GISEL-NEXT: sete %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: is_minus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
@@ -364,6 +500,12 @@ entry:
}
define i1 @not_is_minus_inf_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: not_is_minus_inf_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
+; X86-SDAGISEL-NEXT: setne %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: not_is_minus_inf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -388,6 +530,25 @@ define i1 @not_is_minus_inf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setne %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: not_is_minus_inf_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: pushl %ebx
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: movl %eax, %ecx
+; X86-GISEL-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %edx, %edx
+; X86-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
+; X86-GISEL-NEXT: setb %bl
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: sete %ah
+; X86-GISEL-NEXT: orb %dl, %ah
+; X86-GISEL-NEXT: orb %bl, %ah
+; X86-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
+; X86-GISEL-NEXT: seta %al
+; X86-GISEL-NEXT: orb %ah, %al
+; X86-GISEL-NEXT: popl %ebx
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: not_is_minus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -410,6 +571,14 @@ entry:
}
define i1 @isfinite_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: isfinite_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-SDAGISEL-NEXT: setl %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: isfinite_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -438,6 +607,16 @@ define i1 @isfinite_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setl %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: isfinite_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: setb %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: isfinite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -453,6 +632,14 @@ entry:
}
define i1 @not_isfinite_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: not_isfinite_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-SDAGISEL-NEXT: setge %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: not_isfinite_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -481,6 +668,19 @@ define i1 @not_isfinite_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setge %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: not_isfinite_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: sete %dl
+; X86-GISEL-NEXT: orb %cl, %dl
+; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-GISEL-NEXT: seta %al
+; X86-GISEL-NEXT: orb %dl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: not_isfinite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -499,6 +699,12 @@ entry:
}
define i1 @is_plus_finite_f(float %x) nounwind {
+; X86-SDAGISEL-LABEL: is_plus_finite_f:
+; X86-SDAGISEL: # %bb.0: # %entry
+; X86-SDAGISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-SDAGISEL-NEXT: setb %al
+; X86-SDAGISEL-NEXT: retl
+;
; X64-SDAGISEL-LABEL: is_plus_finite_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -523,6 +729,14 @@ define i1 @is_plus_finite_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setb %al
; X64-FASTISEL-NEXT: retq
;
+; X86-GISEL-LABEL: is_plus_finite_f:
+; X86-GISEL: # %bb.0: # %entry
+; X86-GISEL-NEXT: xorl %ecx, %ecx
+; X86-GISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-GISEL-NEXT: setb %al
+; X86-GISEL-NEXT: orb %cl, %al
+; X86-GISEL-NEXT: retl
+;
; X64-GISEL-LABEL: is_plus_finite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
>From ae92cf5a68453152043c56fd2e04d5c0bad73593 Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Wed, 10 Dec 2025 01:44:09 -0800
Subject: [PATCH 4/5] Revert "update fixup after isel"
This reverts commit 9882bd1972dbefc5f0efe2b58396ec7b246a5050.
---
llvm/lib/Target/X86/CMakeLists.txt | 1 -
.../lib/Target/X86/GISel/X86PostIselFixup.cpp | 71 ------
llvm/lib/Target/X86/X86.h | 7 +-
llvm/lib/Target/X86/X86TargetMachine.cpp | 5 +-
llvm/test/CodeGen/X86/isel-fpclass.ll | 216 +-----------------
5 files changed, 3 insertions(+), 297 deletions(-)
delete mode 100644 llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp
diff --git a/llvm/lib/Target/X86/CMakeLists.txt b/llvm/lib/Target/X86/CMakeLists.txt
index 4f37b048fef94..f9bd233cf8ecf 100644
--- a/llvm/lib/Target/X86/CMakeLists.txt
+++ b/llvm/lib/Target/X86/CMakeLists.txt
@@ -88,7 +88,6 @@ set(sources
X86InsertWait.cpp
GISel/X86CallLowering.cpp
GISel/X86InstructionSelector.cpp
- GISel/X86PostIselFixup.cpp
GISel/X86LegalizerInfo.cpp
GISel/X86RegisterBankInfo.cpp
)
diff --git a/llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp b/llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp
deleted file mode 100644
index d8271c584f801..0000000000000
--- a/llvm/lib/Target/X86/GISel/X86PostIselFixup.cpp
+++ /dev/null
@@ -1,71 +0,0 @@
-//===- X86InstructionSelector.cpp -----------------------------------------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This file implements the fixup after instruction selection for
-/// X86.
-//===----------------------------------------------------------------------===//
-
-#include "X86.h"
-#include "X86InstrBuilder.h"
-#include "X86RegisterBankInfo.h"
-#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/Pass.h"
-
-#define DEBUG_TYPE "X86-post-isel-fixup"
-
-using namespace llvm;
-/* Motivation:
- After DAGISEL, InstrEmitter emits Sub_Reg Node by applying constraint on
- register classes. e.g. GR32 defination with subreg_8bit adds constrainting
- register class GR32_ABCD.
- With GISEL, this fixup needs to be after ISEL, before verifier.
- */
-namespace {
-class X86PostIselFixup : public MachineFunctionPass {
-public:
- static char ID;
- X86PostIselFixup() : MachineFunctionPass(ID) {}
-
- StringRef getPassName() const override { return "X86 Post ISel Fixup"; }
-
- bool runOnMachineFunction(MachineFunction &MF) override {
- LLVM_DEBUG(dbgs() << "Running X86 Post ISel Fixup on function: "
- << MF.getName() << "\n");
- const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
- MachineRegisterInfo &MRI = MF.getRegInfo();
- bool Changed = false;
- for (auto &MBB : MF) {
- for (auto &MI : MBB) {
- if (MI.getOpcode() == TargetOpcode::COPY) {
- LLVM_DEBUG(dbgs() << "Reg Constraint Fixup: "; MI.dump());
- auto CopyOpd = MI.getOperand(1);
- if (CopyOpd.getSubReg() != 0) {
- auto VReg = CopyOpd.getReg();
- const TargetRegisterClass *RC = TRI.getSubClassWithSubReg(
- MRI.getRegClass(VReg), CopyOpd.getSubReg());
- MRI.constrainRegClass(VReg, RC);
- Changed |= true;
- }
- }
- }
- }
- return Changed;
- }
-};
-
-} // end anonymous namespace
-
-char X86PostIselFixup::ID = 0;
-
-INITIALIZE_PASS(X86PostIselFixup, DEBUG_TYPE, "X86 Post ISel Fixup", false,
- false)
-
-FunctionPass *llvm::createX86PostIselFixupPass() {
- return new X86PostIselFixup();
-}
\ No newline at end of file
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index bc42a1c38c410..6261fadf10a7a 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -152,11 +152,6 @@ FunctionPass *createX86InsertPrefetchPass();
/// fp exceptions when strict-fp enabled.
FunctionPass *createX86InsertX87waitPass();
-/// This pass fixes post-isel constraints, such as register constraints for
-/// Sub registers. Ideally Tablgen GISel would handle most of constraints, since
-/// some parts of X86 are handled manually/imported from DAG, we need pass to fix.
-FunctionPass * createX86PostIselFixupPass();
-
/// This pass optimizes arithmetic based on knowledge that is only used by
/// a reduction sequence and is therefore safe to reassociate in interesting
/// ways.
@@ -212,7 +207,7 @@ void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);
void initializeX86TileConfigPass(PassRegistry &);
void initializeX86SuppressAPXForRelocationPassPass(PassRegistry &);
void initializeX86WinEHUnwindV2Pass(PassRegistry &);
-void initializeX86PostIselFixupPass(PassRegistry &);
+
namespace X86AS {
enum : unsigned {
GS = 256,
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 65ce56fc4e080..8dd6f3d97ccea 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -483,11 +483,8 @@ bool X86PassConfig::addRegBankSelect() {
bool X86PassConfig::addGlobalInstructionSelect() {
addPass(new InstructionSelect(getOptLevel()));
// Add GlobalBaseReg in case there is no SelectionDAG passes afterwards
- if (isGlobalISelAbortEnabled()) {
+ if (isGlobalISelAbortEnabled())
addPass(createX86GlobalBaseRegPass());
- // Fixup must run before verifier after isel.
- addPass(createX86PostIselFixupPass());
- }
return false;
}
diff --git a/llvm/test/CodeGen/X86/isel-fpclass.ll b/llvm/test/CodeGen/X86/isel-fpclass.ll
index 6d8457c8765b7..c7c54a74f5f87 100644
--- a/llvm/test/CodeGen/X86/isel-fpclass.ll
+++ b/llvm/test/CodeGen/X86/isel-fpclass.ll
@@ -4,7 +4,7 @@
; RUN: llc < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
; RUN: llc < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X86,X86-GISEL
-; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-GISEL
+; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64-GISEL
define i1 @isnone_f(float %x) nounwind {
; X86-LABEL: isnone_f:
; X86: # %bb.0: # %entry
@@ -50,17 +50,6 @@ entry:
}
define i1 @issignaling_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: issignaling_f:
-; X86-SDAGISEL: # %bb.0:
-; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-SDAGISEL-NEXT: setl %cl
-; X86-SDAGISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
-; X86-SDAGISEL-NEXT: setge %al
-; X86-SDAGISEL-NEXT: andb %cl, %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: issignaling_f:
; X64-SDAGISEL: # %bb.0:
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -98,19 +87,6 @@ define i1 @issignaling_f(float %x) nounwind {
; X64-FASTISEL-NEXT: andb %cl, %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: issignaling_f:
-; X86-GISEL: # %bb.0:
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: seta %dl
-; X86-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-GISEL-NEXT: setb %al
-; X86-GISEL-NEXT: andb %dl, %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: issignaling_f:
; X64-GISEL: # %bb.0:
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -128,14 +104,6 @@ define i1 @issignaling_f(float %x) nounwind {
}
define i1 @isquiet_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: isquiet_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-SDAGISEL-NEXT: setge %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: isquiet_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -164,16 +132,6 @@ define i1 @issignaling_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setge %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: isquiet_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-GISEL-NEXT: setae %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: isquiet_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -189,14 +147,6 @@ define i1 @issignaling_f(float %x) nounwind {
}
define i1 @not_isquiet_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: not_isquiet_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-SDAGISEL-NEXT: setl %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: not_isquiet_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -225,25 +175,6 @@ define i1 @not_isquiet_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setl %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: not_isquiet_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: setb %dl
-; X86-GISEL-NEXT: orb %cl, %dl
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: sete %cl
-; X86-GISEL-NEXT: orb %dl, %cl
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: seta %dl
-; X86-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-GISEL-NEXT: setb %al
-; X86-GISEL-NEXT: andb %dl, %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: not_isquiet_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -268,14 +199,6 @@ entry:
}
define i1 @isinf_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: isinf_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-SDAGISEL-NEXT: sete %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: isinf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -304,16 +227,6 @@ define i1 @isinf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: sete %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: isinf_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: sete %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: isinf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -329,14 +242,6 @@ entry:
}
define i1 @not_isinf_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: not_isinf_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-SDAGISEL-NEXT: setne %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: not_isinf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -365,19 +270,6 @@ define i1 @not_isinf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setne %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: not_isinf_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: setb %dl
-; X86-GISEL-NEXT: orb %cl, %dl
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: seta %al
-; X86-GISEL-NEXT: orb %dl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: not_isinf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -396,12 +288,6 @@ entry:
}
define i1 @is_plus_inf_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: is_plus_inf_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-SDAGISEL-NEXT: sete %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: is_plus_inf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -426,14 +312,6 @@ define i1 @is_plus_inf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: sete %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: is_plus_inf_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-GISEL-NEXT: sete %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: is_plus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
@@ -448,12 +326,6 @@ entry:
}
define i1 @is_minus_inf_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: is_minus_inf_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
-; X86-SDAGISEL-NEXT: sete %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: is_minus_inf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -478,14 +350,6 @@ define i1 @is_minus_inf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: sete %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: is_minus_inf_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
-; X86-GISEL-NEXT: sete %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: is_minus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
@@ -500,12 +364,6 @@ entry:
}
define i1 @not_is_minus_inf_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: not_is_minus_inf_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
-; X86-SDAGISEL-NEXT: setne %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: not_is_minus_inf_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -530,25 +388,6 @@ define i1 @not_is_minus_inf_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setne %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: not_is_minus_inf_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: pushl %ebx
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: movl %eax, %ecx
-; X86-GISEL-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %edx, %edx
-; X86-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
-; X86-GISEL-NEXT: setb %bl
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: sete %ah
-; X86-GISEL-NEXT: orb %dl, %ah
-; X86-GISEL-NEXT: orb %bl, %ah
-; X86-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
-; X86-GISEL-NEXT: seta %al
-; X86-GISEL-NEXT: orb %ah, %al
-; X86-GISEL-NEXT: popl %ebx
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: not_is_minus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -571,14 +410,6 @@ entry:
}
define i1 @isfinite_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: isfinite_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-SDAGISEL-NEXT: setl %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: isfinite_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -607,16 +438,6 @@ define i1 @isfinite_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setl %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: isfinite_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: setb %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: isfinite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -632,14 +453,6 @@ entry:
}
define i1 @not_isfinite_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: not_isfinite_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-SDAGISEL-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-SDAGISEL-NEXT: setge %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: not_isfinite_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -668,19 +481,6 @@ define i1 @not_isfinite_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setge %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: not_isfinite_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: sete %dl
-; X86-GISEL-NEXT: orb %cl, %dl
-; X86-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-GISEL-NEXT: seta %al
-; X86-GISEL-NEXT: orb %dl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: not_isfinite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -699,12 +499,6 @@ entry:
}
define i1 @is_plus_finite_f(float %x) nounwind {
-; X86-SDAGISEL-LABEL: is_plus_finite_f:
-; X86-SDAGISEL: # %bb.0: # %entry
-; X86-SDAGISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-SDAGISEL-NEXT: setb %al
-; X86-SDAGISEL-NEXT: retl
-;
; X64-SDAGISEL-LABEL: is_plus_finite_f:
; X64-SDAGISEL: # %bb.0: # %entry
; X64-SDAGISEL-NEXT: movd %xmm0, %eax
@@ -729,14 +523,6 @@ define i1 @is_plus_finite_f(float %x) nounwind {
; X64-FASTISEL-NEXT: setb %al
; X64-FASTISEL-NEXT: retq
;
-; X86-GISEL-LABEL: is_plus_finite_f:
-; X86-GISEL: # %bb.0: # %entry
-; X86-GISEL-NEXT: xorl %ecx, %ecx
-; X86-GISEL-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-GISEL-NEXT: setb %al
-; X86-GISEL-NEXT: orb %cl, %al
-; X86-GISEL-NEXT: retl
-;
; X64-GISEL-LABEL: is_plus_finite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
>From 34489ba4219d7ab6c06cba3ae1dadc9a96f57186 Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Fri, 12 Dec 2025 02:53:10 -0800
Subject: [PATCH 5/5] update review comments
---
.../CodeGen/GlobalISel/InstructionSelect.cpp | 9 -
llvm/test/CodeGen/X86/isel-fpclass.ll | 347 +++++++++---------
2 files changed, 182 insertions(+), 174 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index ac6d5653e13cf..2dd22c8a7e8ba 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -238,7 +238,6 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
continue;
}
// Try to find redundant copies b/w vregs of the same register class.
- // Try to constrain the register class of the copy operand.
for (auto MII = MBB.rbegin(), End = MBB.rend(); MII != End;) {
MachineInstr &MI = *MII;
++MII;
@@ -255,14 +254,6 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
MI.eraseFromParent();
}
}
- auto CopyOpd = MI.getOperand(1);
- if (CopyOpd.getSubReg() != 0) {
- auto VReg = CopyOpd.getReg();
- const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
- const TargetRegisterClass *RC = TRI.getSubClassWithSubReg(
- MRI.getRegClass(VReg), CopyOpd.getSubReg());
- MRI.constrainRegClass(VReg, RC);
- }
}
}
diff --git a/llvm/test/CodeGen/X86/isel-fpclass.ll b/llvm/test/CodeGen/X86/isel-fpclass.ll
index c7c54a74f5f87..8d602badc84bc 100644
--- a/llvm/test/CodeGen/X86/isel-fpclass.ll
+++ b/llvm/test/CodeGen/X86/isel-fpclass.ll
@@ -1,10 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86,X86-SDAGISEL
+; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefixes=X64,X64-SDAGISEL
; RUN: llc < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
; RUN: llc < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
-; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X86,X86-GISEL
; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64-GISEL
+; Disabling i686 global isel test due to sub_reg constraint issues.
+; llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=1
define i1 @isnone_f(float %x) nounwind {
; X86-LABEL: isnone_f:
; X86: # %bb.0: # %entry
@@ -22,6 +23,11 @@ define i1 @isnone_f(float %x) nounwind {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: xorl %eax, %eax
; X86-FASTISEL-NEXT: retl
+;
+; X64-GISEL-LABEL: isnone_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %eax, %eax
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 0)
ret i1 %0
@@ -44,22 +50,38 @@ define i1 @isany_f(float %x) nounwind {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: movb $1, %al
; X86-FASTISEL-NEXT: retl
+;
+; X64-GISEL-LABEL: isany_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movb $1, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1023)
ret i1 %0
}
define i1 @issignaling_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: issignaling_f:
-; X64-SDAGISEL: # %bb.0:
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-SDAGISEL-NEXT: setl %cl
-; X64-SDAGISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
-; X64-SDAGISEL-NEXT: setge %al
-; X64-SDAGISEL-NEXT: andb %cl, %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: issignaling_f:
+; X86: # %bb.0:
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-NEXT: setl %cl
+; X86-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X86-NEXT: setge %al
+; X86-NEXT: andb %cl, %al
+; X86-NEXT: retl
+;
+; X64-LABEL: issignaling_f:
+; X64: # %bb.0:
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-NEXT: setl %cl
+; X64-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X64-NEXT: setge %al
+; X64-NEXT: andb %cl, %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: issignaling_f:
; X86-FASTISEL: # %bb.0:
@@ -76,17 +98,6 @@ define i1 @issignaling_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: issignaling_f:
-; X64-FASTISEL: # %bb.0:
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-FASTISEL-NEXT: setl %cl
-; X64-FASTISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
-; X64-FASTISEL-NEXT: setge %al
-; X64-FASTISEL-NEXT: andb %cl, %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: issignaling_f:
; X64-GISEL: # %bb.0:
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -104,13 +115,21 @@ define i1 @issignaling_f(float %x) nounwind {
}
define i1 @isquiet_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: isquiet_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-SDAGISEL-NEXT: setge %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: isquiet_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-NEXT: setge %al
+; X86-NEXT: retl
+;
+; X64-LABEL: isquiet_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-NEXT: setge %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: isquiet_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -124,14 +143,6 @@ define i1 @issignaling_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: isquiet_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-FASTISEL-NEXT: setge %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: isquiet_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -147,13 +158,21 @@ define i1 @issignaling_f(float %x) nounwind {
}
define i1 @not_isquiet_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: not_isquiet_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-SDAGISEL-NEXT: setl %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: not_isquiet_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X86-NEXT: setl %al
+; X86-NEXT: retl
+;
+; X64-LABEL: not_isquiet_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-NEXT: setl %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isquiet_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -167,14 +186,6 @@ define i1 @not_isquiet_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: not_isquiet_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-FASTISEL-NEXT: setl %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: not_isquiet_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -199,13 +210,21 @@ entry:
}
define i1 @isinf_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: isinf_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-SDAGISEL-NEXT: sete %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: isinf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: sete %al
+; X86-NEXT: retl
+;
+; X64-LABEL: isinf_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-NEXT: sete %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: isinf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -219,14 +238,6 @@ define i1 @isinf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: isinf_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-FASTISEL-NEXT: sete %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: isinf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -242,13 +253,21 @@ entry:
}
define i1 @not_isinf_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: not_isinf_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-SDAGISEL-NEXT: setne %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: not_isinf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: setne %al
+; X86-NEXT: retl
+;
+; X64-LABEL: not_isinf_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-NEXT: setne %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isinf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -262,14 +281,6 @@ define i1 @not_isinf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: not_isinf_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-FASTISEL-NEXT: setne %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: not_isinf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -288,12 +299,18 @@ entry:
}
define i1 @is_plus_inf_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: is_plus_inf_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-SDAGISEL-NEXT: sete %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: is_plus_inf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-NEXT: sete %al
+; X86-NEXT: retl
+;
+; X64-LABEL: is_plus_inf_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-NEXT: sete %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: is_plus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -305,13 +322,6 @@ define i1 @is_plus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: is_plus_inf_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-FASTISEL-NEXT: sete %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: is_plus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
@@ -326,12 +336,18 @@ entry:
}
define i1 @is_minus_inf_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: is_minus_inf_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-SDAGISEL-NEXT: sete %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: is_minus_inf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
+; X86-NEXT: sete %al
+; X86-NEXT: retl
+;
+; X64-LABEL: is_minus_inf_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-NEXT: sete %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: is_minus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -343,13 +359,6 @@ define i1 @is_minus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: is_minus_inf_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-FASTISEL-NEXT: sete %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: is_minus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
@@ -364,12 +373,18 @@ entry:
}
define i1 @not_is_minus_inf_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: not_is_minus_inf_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-SDAGISEL-NEXT: setne %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: not_is_minus_inf_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
+; X86-NEXT: setne %al
+; X86-NEXT: retl
+;
+; X64-LABEL: not_is_minus_inf_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-NEXT: setne %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: not_is_minus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -381,13 +396,6 @@ define i1 @not_is_minus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: not_is_minus_inf_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-FASTISEL-NEXT: setne %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: not_is_minus_inf_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -410,13 +418,21 @@ entry:
}
define i1 @isfinite_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: isfinite_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-SDAGISEL-NEXT: setl %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: isfinite_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: setl %al
+; X86-NEXT: retl
+;
+; X64-LABEL: isfinite_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-NEXT: setl %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: isfinite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -430,14 +446,6 @@ define i1 @isfinite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: isfinite_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-FASTISEL-NEXT: setl %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: isfinite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -453,13 +461,21 @@ entry:
}
define i1 @not_isfinite_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: not_isfinite_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-SDAGISEL-NEXT: setge %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: not_isfinite_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
+; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X86-NEXT: setge %al
+; X86-NEXT: retl
+;
+; X64-LABEL: not_isfinite_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-NEXT: setge %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isfinite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -473,14 +489,6 @@ define i1 @not_isfinite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: not_isfinite_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-FASTISEL-NEXT: setge %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: not_isfinite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: movd %xmm0, %eax
@@ -499,12 +507,18 @@ entry:
}
define i1 @is_plus_finite_f(float %x) nounwind {
-; X64-SDAGISEL-LABEL: is_plus_finite_f:
-; X64-SDAGISEL: # %bb.0: # %entry
-; X64-SDAGISEL-NEXT: movd %xmm0, %eax
-; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-SDAGISEL-NEXT: setb %al
-; X64-SDAGISEL-NEXT: retq
+; X86-LABEL: is_plus_finite_f:
+; X86: # %bb.0: # %entry
+; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
+; X86-NEXT: setb %al
+; X86-NEXT: retl
+;
+; X64-LABEL: is_plus_finite_f:
+; X64: # %bb.0: # %entry
+; X64-NEXT: movd %xmm0, %eax
+; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-NEXT: setb %al
+; X64-NEXT: retq
;
; X86-FASTISEL-LABEL: is_plus_finite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -516,13 +530,6 @@ define i1 @is_plus_finite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
;
-; X64-FASTISEL-LABEL: is_plus_finite_f:
-; X64-FASTISEL: # %bb.0: # %entry
-; X64-FASTISEL-NEXT: movd %xmm0, %eax
-; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-FASTISEL-NEXT: setb %al
-; X64-FASTISEL-NEXT: retq
-;
; X64-GISEL-LABEL: is_plus_finite_f:
; X64-GISEL: # %bb.0: # %entry
; X64-GISEL-NEXT: xorl %ecx, %ecx
@@ -553,6 +560,11 @@ define i1 @isnone_d(double %x) nounwind {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: xorl %eax, %eax
; X86-FASTISEL-NEXT: retl
+;
+; X64-GISEL-LABEL: isnone_d:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %eax, %eax
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 0)
ret i1 %0
@@ -575,6 +587,11 @@ define i1 @isany_d(double %x) nounwind {
; X86-FASTISEL-NEXT: fstp %st(0)
; X86-FASTISEL-NEXT: movb $1, %al
; X86-FASTISEL-NEXT: retl
+;
+; X64-GISEL-LABEL: isany_d:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movb $1, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f64(double %x, i32 1023)
ret i1 %0
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