[llvm] [AMDGPU][NFC] Add an optional DSE pass during CodeGenPrepare (PR #172069)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> We need this downstream since we have added a major IR transform in the middle end optimizer that require extra DSE afterwards. 

This sounds like it could use better placement. This must have a phase ordering test that shows its useful, so keep it with this transform 

https://github.com/llvm/llvm-project/pull/172069