[llvm] 112a612 - Fixes non-functional changes found static analyzer (#171197)
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Fri Dec 12 11:03:08 PST 2025
Author: Seraphimt
Date: 2025-12-12T20:03:02+01:00
New Revision: 112a6126ef1ca616c953bf0d53ae5ce99da79ce6
URL: https://github.com/llvm/llvm-project/commit/112a6126ef1ca616c953bf0d53ae5ce99da79ce6
DIFF: https://github.com/llvm/llvm-project/commit/112a6126ef1ca616c953bf0d53ae5ce99da79ce6.diff
LOG: Fixes non-functional changes found static analyzer (#171197)
As per @arsenm 's instructions, I've separated the non-functional
changes from https://github.com/llvm/llvm-project/pull/169958.
Afterwards I'll tackle the functional ones one by one. I hope I did
everything right this time.
Full descriptions in the article:
https://pvs-studio.com/en/blog/posts/cpp/1318/
3. Array overrun is possible.
The PVS-Studio warning: V557 Array overrun is possible. The value of
'regIdx' index could reach 31. VEAsmParser.cpp 696
10. Excessive check.
The PVS-Studio warning: V547 Expression 'IsLeaf' is always false.
PPCInstrInfo.cpp 419
11. Doubling the same check.
The PVS-Studio warning: V581 The conditional expressions of the 'if'
statements situated alongside each other are identical. Check lines:
5820, 5823. PPCInstrInfo.cpp 5823
15. Excessive check.
The PVS-Studio warning: V547 Expression 'i != e' is always true.
MachineFunction.cpp 1444
17. Excessive assignment.
The PVS-Studio warning: V1048 The 'FirstOp' variable was assigned the
same value. MachineInstr.cpp 1995
18. Excessive check.
The PVS-Studio warning: V547 Expression 'AllSame' is always true.
SimplifyCFG.cpp 1914
19. Excessive check.
The PVS-Studio warning: V547 Expression 'AbbrevDecl' is always true.
LVDWARFReader.cpp 398
Added:
Modified:
llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 634547ded992f..8d7694537e07d 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -1439,8 +1439,7 @@ void MachineJumpTableInfo::print(raw_ostream &OS) const {
OS << printJumpTableEntryReference(i) << ':';
for (const MachineBasicBlock *MBB : JumpTables[i].MBBs)
OS << ' ' << printMBBReference(*MBB);
- if (i != e)
- OS << '\n';
+ OS << '\n';
}
OS << '\n';
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 18111156efa4f..c801d3deafa0f 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -2011,7 +2011,6 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
// operands.
if (MCSymbol *PreInstrSymbol = getPreInstrSymbol()) {
if (!FirstOp) {
- FirstOp = false;
OS << ',';
}
OS << " pre-instr-symbol ";
@@ -2019,7 +2018,6 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
if (MCSymbol *PostInstrSymbol = getPostInstrSymbol()) {
if (!FirstOp) {
- FirstOp = false;
OS << ',';
}
OS << " post-instr-symbol ";
@@ -2027,7 +2025,6 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
if (MDNode *HeapAllocMarker = getHeapAllocMarker()) {
if (!FirstOp) {
- FirstOp = false;
OS << ',';
}
OS << " heap-alloc-marker ";
@@ -2035,7 +2032,6 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
if (MDNode *PCSections = getPCSections()) {
if (!FirstOp) {
- FirstOp = false;
OS << ',';
}
OS << " pcsections ";
@@ -2043,7 +2039,6 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
if (MDNode *MMRA = getMMRAMetadata()) {
if (!FirstOp) {
- FirstOp = false;
OS << ',';
}
OS << " mmra ";
diff --git a/llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp b/llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
index 3ba5061718144..772d821dcda81 100644
--- a/llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
+++ b/llvm/lib/DebugInfo/LogicalView/Readers/LVDWARFReader.cpp
@@ -395,10 +395,9 @@ LVScope *LVDWARFReader::processOneDie(const DWARFDie &InputDIE, LVScope *Parent,
if (abbrCode) {
if (const DWARFAbbreviationDeclaration *AbbrevDecl =
TheDIE.getAbbreviationDeclarationPtr())
- if (AbbrevDecl)
- for (const DWARFAbbreviationDeclaration::AttributeSpec &AttrSpec :
- AbbrevDecl->attributes())
- processOneAttribute(TheDIE, &CurrentEndOffset, AttrSpec);
+ for (const DWARFAbbreviationDeclaration::AttributeSpec &AttrSpec :
+ AbbrevDecl->attributes())
+ processOneAttribute(TheDIE, &CurrentEndOffset, AttrSpec);
}
};
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 99bef417eaa89..7d71d46278ebf 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -416,7 +416,7 @@ bool PPCInstrInfo::getFMAPatterns(MachineInstr &Root,
// If this is not Leaf FMA Instr, its 'add' operand should only have one use
// as this fma will be changed later.
- return IsLeaf ? true : MRI->hasOneNonDBGUse(OpAdd.getReg());
+ return MRI->hasOneNonDBGUse(OpAdd.getReg());
};
int16_t AddOpIdx = -1;
@@ -5810,9 +5810,6 @@ bool PPCInstrInfo::getMemOperandWithOffsetWidth(
if (!LdSt.getOperand(1).isImm() ||
(!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()))
return false;
- if (!LdSt.getOperand(1).isImm() ||
- (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()))
- return false;
if (!LdSt.hasOneMemOperand())
return false;
diff --git a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
index 9b47d237f0702..eceddd66e39d5 100644
--- a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
+++ b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
@@ -694,7 +694,7 @@ class VEOperand : public MCParsedAsmOperand {
if (!ConstExpr)
return false;
unsigned regIdx = ConstExpr->getValue();
- if (regIdx > 31 || MISCRegs[regIdx] == VE::NoRegister)
+ if (regIdx >= std::size(MISCRegs) || MISCRegs[regIdx] == VE::NoRegister)
return false;
Op.Kind = k_Register;
Op.Reg.Reg = MISCRegs[regIdx];
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index cecbd8072a40a..11ffb40cd2816 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -1913,17 +1913,15 @@ bool SimplifyCFGOpt::hoistCommonCodeFromSuccessors(Instruction *TI,
});
if (!AllSame)
return false;
- if (AllSame) {
- LockstepReverseIterator<true> LRI(UniqueSuccessors.getArrayRef());
- while (LRI.isValid()) {
- Instruction *I0 = (*LRI)[0];
- if (any_of(*LRI, [I0](Instruction *I) {
- return !areIdenticalUpToCommutativity(I0, I);
- })) {
- return false;
- }
- --LRI;
+ LockstepReverseIterator<true> LRI(UniqueSuccessors.getArrayRef());
+ while (LRI.isValid()) {
+ Instruction *I0 = (*LRI)[0];
+ if (any_of(*LRI, [I0](Instruction *I) {
+ return !areIdenticalUpToCommutativity(I0, I);
+ })) {
+ return false;
}
+ --LRI;
}
// Now we know that all instructions in all successors can be hoisted. Let
// the loop below handle the hoisting.
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