[llvm] [AMDGPU] Schedule independent instructions between s_barrier_signal and s_barrier_wait (PR #172057)

[Matt Arsenault via llvm-commits]

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@@ -41,38 +51,58 @@ class BarrierLatency : public ScheduleDAGMutation {
   void apply(ScheduleDAGInstrs *DAG) override;
 };
 
+void addLatencyToEdge(SDep &PredDep, SUnit &SU, unsigned Latency) {
+  SUnit *PredSU = PredDep.getSUnit();
+  SDep ForwardD = PredDep;
+  ForwardD.setSUnit(&SU);
+  for (SDep &SuccDep : PredSU->Succs) {
+    if (SuccDep == ForwardD) {
+      SuccDep.setLatency(SuccDep.getLatency() + Latency);
+      break;
+    }
+  }
+  PredDep.setLatency(PredDep.getLatency() + Latency);
+  PredSU->setDepthDirty();
+  SU.setDepthDirty();
+}
+
 void BarrierLatency::apply(ScheduleDAGInstrs *DAG) {
-  constexpr unsigned SyntheticLatency = 2000;
+  const SIInstrInfo *TII = static_cast<const SIInstrInfo *>(DAG->TII);
+  constexpr unsigned FenceLatency = 2000;
+  const unsigned BarrierSignalWaitLatency = BarrierSignalWaitLatencyOpt;
+
   for (SUnit &SU : DAG->SUnits) {
     const MachineInstr *MI = SU.getInstr();
-    if (MI->getOpcode() != AMDGPU::ATOMIC_FENCE)
-      continue;
+    unsigned Op = MI->getOpcode();
 
-    // Update latency on barrier edges of ATOMIC_FENCE.
-    // Ignore scopes not expected to have any latency.
-    SyncScope::ID SSID = static_cast<SyncScope::ID>(MI->getOperand(1).getImm());
-    if (IgnoredScopes.contains(SSID))
-      continue;
-
-    for (SDep &PredDep : SU.Preds) {
-      if (!PredDep.isBarrier())
-        continue;
-      SUnit *PredSU = PredDep.getSUnit();
-      MachineInstr *MI = PredSU->getInstr();
-      // Only consider memory loads
-      if (!MI->mayLoad() || MI->mayStore())
+    if (Op == AMDGPU::ATOMIC_FENCE) {
+      // Update latency on barrier edges of ATOMIC_FENCE.
+      // Ignore scopes not expected to have any latency.
+      SyncScope::ID SSID =
+          static_cast<SyncScope::ID>(MI->getOperand(1).getImm());
+      if (IgnoredScopes.contains(SSID))
         continue;
-      SDep ForwardD = PredDep;
-      ForwardD.setSUnit(&SU);
-      for (SDep &SuccDep : PredSU->Succs) {
-        if (SuccDep == ForwardD) {
-          SuccDep.setLatency(SuccDep.getLatency() + SyntheticLatency);
-          break;
+
+      for (SDep &PredDep : SU.Preds) {
+        if (!PredDep.isBarrier())
+          continue;
+        SUnit *PredSU = PredDep.getSUnit();
+        MachineInstr *MI = PredSU->getInstr();
+        // Only consider memory loads
+        if (!MI->mayLoad() || MI->mayStore())
+          continue;
+        addLatencyToEdge(PredDep, SU, FenceLatency);
+      }
+    }
+
+    else if (Op == AMDGPU::S_BARRIER_WAIT) {
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arsenm wrote:

Fix formatting 

https://github.com/llvm/llvm-project/pull/172057