[llvm] [AMDGPU] Add register pressure guard on LLVM-IR level to prevent harmful optimizations (PR #171267)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> But for whatever reasons, the backend has never been able to undo it well enough.

Exec register barriers and bad to nonexistent rematerialized with subregister defs. Both of which we should be fixing 

https://github.com/llvm/llvm-project/pull/171267