[llvm] [RISCV] Combine (addi (addi)) and add post riscv-opt-w-instrs machine-combiner (PR #171165)
Piotr Fusik via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 9 01:54:42 PST 2025
pfusik wrote:
> Have you looked at the impact across other workloads?
No, I only looked at [llvm-codegen-benchmark](https://github.com/dtcxzyw/llvm-codegen-benchmark). I'd appreciate help in checking against other benchmarks.
> I'm bit concerned about adding another run of a pass if this isn't a common issue.
How about we remove the pre-`opt-w-instrs` `machine-combiner`? I added a commit doing that. While the emitted code is different, it doesn't look worse (also checked with llvm-codegen-benchmark). I commented two tests that need further inspection.
https://github.com/llvm/llvm-project/pull/171165
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