[llvm] HexagonGenWideningVecInstr.cpp - fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC. (PR #171095)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-hexagon

Author: Simon Pilgrim (RKSimon)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/171095.diff


1 Files Affected:

- (modified) llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp (+1-1) 


``````````diff
diff --git a/llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp b/llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp
index 895de57561430..478eaf10b0710 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp
@@ -596,7 +596,7 @@ bool HexagonGenWideningVecInstr::replaceWithIntrinsic(Instruction *Inst,
   if (IsConstScalar && OPK == OP_Shl) {
     if (((NewOpEltSize == 8) && (SplatVal > 0) && (SplatVal < 8)) ||
         ((NewOpEltSize == 16) && (SplatVal > 0) && (SplatVal < 16))) {
-      SplatVal = 1 << SplatVal;
+      SplatVal = 1LL << SplatVal;
       OPK = OP_Mul;
     } else {
       return false;

``````````

</details>


https://github.com/llvm/llvm-project/pull/171095