[llvm] [M68k] add test showing callseq begin failure for doubles, and fix mem chain generation (PR #170049)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 30 12:03:05 PST 2025
https://github.com/knickish created https://github.com/llvm/llvm-project/pull/170049
None
>From c513a96b14b0ccad878be5717fd402830b44d82e Mon Sep 17 00:00:00 2001
From: kirk <knickish at gmail.com>
Date: Sun, 23 Mar 2025 01:05:12 +0000
Subject: [PATCH] [M68k] add test showing callseq begin failure for doubles,
and fix mem chain generation
---
.../SelectionDAG/ScheduleDAGRRList.cpp | 6 +-
llvm/lib/Target/M68k/M68kISelLowering.cpp | 7 +-
llvm/lib/Target/M68k/M68kInstrArithmetic.td | 202 +++++++++---------
llvm/test/CodeGen/M68k/Regression/146213.ll | 54 +++++
4 files changed, 160 insertions(+), 109 deletions(-)
create mode 100644 llvm/test/CodeGen/M68k/Regression/146213.ll
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 12fc26d949581..09f7e07fb0343 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -507,7 +507,8 @@ FindCallSeqStart(SDNode *N, unsigned &NestLevel, unsigned &MaxNest,
BestMaxNest = MyMaxNest;
}
}
- assert(Best);
+ if (!Best)
+ return nullptr;
MaxNest = BestMaxNest;
return Best;
}
@@ -584,7 +585,8 @@ void ScheduleDAGRRList::ReleasePredecessors(SUnit *SU) {
unsigned NestLevel = 0;
unsigned MaxNest = 0;
SDNode *N = FindCallSeqStart(Node, NestLevel, MaxNest, TII);
- assert(N && "Must find call sequence start");
+ if (!N)
+ break;
SUnit *Def = &SUnits[N->getNodeId()];
CallSeqEndForStart[Def] = SU;
diff --git a/llvm/lib/Target/M68k/M68kISelLowering.cpp b/llvm/lib/Target/M68k/M68kISelLowering.cpp
index 65084087f6e3f..c1810b0067478 100644
--- a/llvm/lib/Target/M68k/M68kISelLowering.cpp
+++ b/llvm/lib/Target/M68k/M68kISelLowering.cpp
@@ -633,7 +633,6 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
Chain = EmitTailCallLoadRetAddr(DAG, RetFI, Chain, IsTailCall, FPDiff, DL);
SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
- SmallVector<SDValue, 8> MemOpChains;
SDValue StackPtr;
// Walk the register/memloc assignments, inserting copies/loads. In the case
@@ -689,14 +688,10 @@ SDValue M68kTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
StackPtr = DAG.getCopyFromReg(Chain, DL, RegInfo->getStackRegister(),
getPointerTy(DAG.getDataLayout()));
}
- MemOpChains.push_back(
- LowerMemOpCallTo(Chain, StackPtr, Arg, DL, DAG, VA, Flags));
+ Chain = LowerMemOpCallTo(Chain, StackPtr, Arg, DL, DAG, VA, Flags);
}
}
- if (!MemOpChains.empty())
- Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains);
-
// FIXME Make sure PIC style GOT works as expected
// The only time GOT is really needed is for Medium-PIC static data
// otherwise we are happy with pc-rel or static references
diff --git a/llvm/lib/Target/M68k/M68kInstrArithmetic.td b/llvm/lib/Target/M68k/M68kInstrArithmetic.td
index 56b71db2d1d2f..499160cc09011 100644
--- a/llvm/lib/Target/M68k/M68kInstrArithmetic.td
+++ b/llvm/lib/Target/M68k/M68kInstrArithmetic.td
@@ -1004,105 +1004,105 @@ defm : BitwisePat<"XOR", xor>;
// Floating point arithmetic instruction
//===----------------------------------------------------------------------===//
-let Defs = [FPS] in
-class MxFArithBase_FF<dag outs, dag ins, string asm, string rounding,
- list<dag> patterns>
- : MxInst<outs, ins, asm, patterns> {
- let Uses = !if(!eq(rounding, ""), [FPC], []);
-
- let Predicates = !if(!eq(rounding, ""), [AtLeastM68881], [AtLeastM68040]);
-}
-
-class MxFPOpModeSelector<string rounding, bits<7> single, bits<7> double,
- bits<7> extended> {
- bits<7> Mode = !cond(!eq(rounding, "s"): single,
- !eq(rounding, "d"): double,
- !eq(rounding, ""): extended);
-}
-
-//===----------------------------------------------------------------------===//
-// Unary floating point instruction
-//===----------------------------------------------------------------------===//
-
-class MxFUnary_FF<MxOpBundle Opnd, string rounding,
- string mnemonic, bits<7> opmode>
- : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src),
- "f"#rounding#mnemonic#".x\t$src, $dst", rounding, [(null_frag)]> {
- let Inst = (ascend
- (descend 0b1111,
- /*COPROCESSOR ID*/0b001,
- 0b000,
- /*MODE+REGISTER*/0b000000),
- (descend 0b0, /* R/M */ 0b0, 0b0,
- /*SOURCE SPECIFIER*/
- (operand "$src", 3),
- /*DESTINATION*/
- (operand "$dst", 3),
- /*OPMODE*/
- opmode)
- );
-}
-
-multiclass MxFUnaryOp<string mnemonic, bits<7> single, bits<7> double,
- bits<7> extended> {
- foreach rounding = ["", "s", "d"] in {
- defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
-
- def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
- : MxFUnary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
+// let Defs = [FPS] in
+// class MxFArithBase_FF<dag outs, dag ins, string asm, string rounding,
+// list<dag> patterns>
+// : MxInst<outs, ins, asm, patterns> {
+// let Uses = !if(!eq(rounding, ""), [FPC], []);
+
+// let Predicates = !if(!eq(rounding, ""), [AtLeastM68881], [AtLeastM68040]);
+// }
+
+// class MxFPOpModeSelector<string rounding, bits<7> single, bits<7> double,
+// bits<7> extended> {
+// bits<7> Mode = !cond(!eq(rounding, "s"): single,
+// !eq(rounding, "d"): double,
+// !eq(rounding, ""): extended);
+// }
+
+// //===----------------------------------------------------------------------===//
+// // Unary floating point instruction
+// //===----------------------------------------------------------------------===//
+
+// class MxFUnary_FF<MxOpBundle Opnd, string rounding,
+// string mnemonic, bits<7> opmode>
+// : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src),
+// "f"#rounding#mnemonic#".x\t$src, $dst", rounding, [(null_frag)]> {
+// let Inst = (ascend
+// (descend 0b1111,
+// /*COPROCESSOR ID*/0b001,
+// 0b000,
+// /*MODE+REGISTER*/0b000000),
+// (descend 0b0, /* R/M */ 0b0, 0b0,
+// /*SOURCE SPECIFIER*/
+// (operand "$src", 3),
+// /*DESTINATION*/
+// (operand "$dst", 3),
+// /*OPMODE*/
+// opmode)
+// );
+// }
+
+// multiclass MxFUnaryOp<string mnemonic, bits<7> single, bits<7> double,
+// bits<7> extended> {
+// foreach rounding = ["", "s", "d"] in {
+// defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
+
+// def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
+// : MxFUnary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
- let isCodeGenOnly = 1 in
- foreach size = [32, 64] in
- def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
- : MxFUnary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
- rounding, mnemonic, opmode>;
- }
-}
-
-defm FABS : MxFUnaryOp<"abs", 0b1011000, 0b1011100, 0b0011000>;
-defm FNEG : MxFUnaryOp<"neg", 0b1011010, 0b1011110, 0b0011010>;
-
-//===----------------------------------------------------------------------===//
-// Binary floating point instruction
-//===----------------------------------------------------------------------===//
-
-let Constraints = "$src = $dst" in
-class MxFBinary_FF<MxOpBundle Opnd, string rounding,
- string mnemonic, bits<7> opmode>
- : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src, Opnd.Op:$opd),
- "f"#rounding#mnemonic#".x\t$opd, $dst", rounding, [(null_frag)]> {
- let Inst = (ascend
- (descend 0b1111,
- /*COPROCESSOR ID*/0b001,
- 0b000,
- /*MODE+REGISTER*/0b000000),
- (descend 0b0, /* R/M */ 0b0, 0b0,
- /*SOURCE SPECIFIER*/
- (operand "$opd", 3),
- /*DESTINATION*/
- (operand "$dst", 3),
- /*OPMODE*/
- opmode)
- );
-}
-
-multiclass MxFBinaryOp<string mnemonic, bits<7> single, bits<7> double,
- bits<7> extended> {
- foreach rounding = ["", "s", "d"] in {
- defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
-
- def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
- : MxFBinary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
-
- let isCodeGenOnly = 1 in
- foreach size = [32, 64] in
- def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
- : MxFBinary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
- rounding, mnemonic, opmode>;
- }
-}
-
-defm FADD : MxFBinaryOp<"add", 0b1100010, 0b1100110, 0b0100010>;
-defm FSUB : MxFBinaryOp<"sub", 0b1101000, 0b1101100, 0b0101000>;
-defm FMUL : MxFBinaryOp<"mul", 0b1100011, 0b1100111, 0b0100011>;
-defm FDIV : MxFBinaryOp<"div", 0b1100000, 0b1100100, 0b0100000>;
+// let isCodeGenOnly = 1 in
+// foreach size = [32, 64] in
+// def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
+// : MxFUnary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
+// rounding, mnemonic, opmode>;
+// }
+// }
+
+// defm FABS : MxFUnaryOp<"abs", 0b1011000, 0b1011100, 0b0011000>;
+// defm FNEG : MxFUnaryOp<"neg", 0b1011010, 0b1011110, 0b0011010>;
+
+// //===----------------------------------------------------------------------===//
+// // Binary floating point instruction
+// //===----------------------------------------------------------------------===//
+
+// let Constraints = "$src = $dst" in
+// class MxFBinary_FF<MxOpBundle Opnd, string rounding,
+// string mnemonic, bits<7> opmode>
+// : MxFArithBase_FF<(outs Opnd.Op:$dst), (ins Opnd.Op:$src, Opnd.Op:$opd),
+// "f"#rounding#mnemonic#".x\t$opd, $dst", rounding, [(null_frag)]> {
+// let Inst = (ascend
+// (descend 0b1111,
+// /*COPROCESSOR ID*/0b001,
+// 0b000,
+// /*MODE+REGISTER*/0b000000),
+// (descend 0b0, /* R/M */ 0b0, 0b0,
+// /*SOURCE SPECIFIER*/
+// (operand "$opd", 3),
+// /*DESTINATION*/
+// (operand "$dst", 3),
+// /*OPMODE*/
+// opmode)
+// );
+// }
+
+// multiclass MxFBinaryOp<string mnemonic, bits<7> single, bits<7> double,
+// bits<7> extended> {
+// foreach rounding = ["", "s", "d"] in {
+// defvar opmode = MxFPOpModeSelector<rounding, single, double, extended>.Mode;
+
+// def F # !toupper(rounding) # !substr(NAME, 1) # "80fp_fp"
+// : MxFBinary_FF<MxOp80AddrMode_fpr, rounding, mnemonic, opmode>;
+
+// let isCodeGenOnly = 1 in
+// foreach size = [32, 64] in
+// def F # !toupper(rounding) # !substr(NAME, 1) # size # "fp_fp"
+// : MxFBinary_FF<!cast<MxOpBundle>("MxOp"#size#"AddrMode_fpr"),
+// rounding, mnemonic, opmode>;
+// }
+// }
+
+// defm FADD : MxFBinaryOp<"add", 0b1100010, 0b1100110, 0b0100010>;
+// defm FSUB : MxFBinaryOp<"sub", 0b1101000, 0b1101100, 0b0101000>;
+// defm FMUL : MxFBinaryOp<"mul", 0b1100011, 0b1100111, 0b0100011>;
+// defm FDIV : MxFBinaryOp<"div", 0b1100000, 0b1100100, 0b0100000>;
diff --git a/llvm/test/CodeGen/M68k/Regression/146213.ll b/llvm/test/CodeGen/M68k/Regression/146213.ll
new file mode 100644
index 0000000000000..997df1b569ca7
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/146213.ll
@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=m68k-linux | FileCheck %s
+
+declare float @float_arg(float)
+declare float @double_arg(double)
+
+define float @float_arg_test(ptr %inout) nounwind {
+; CHECK-LABEL: float_arg_test:
+; CHECK: ; %bb.0: ; %start
+; CHECK-NEXT: suba.l #12, %sp
+; CHECK-NEXT: movem.l %a2, (8,%sp) ; 8-byte Folded Spill
+; CHECK-NEXT: move.l #0, (%sp)
+; CHECK-NEXT: jsr float_arg
+; CHECK-NEXT: move.l (16,%sp), %a2
+; CHECK-NEXT: move.l (%a2), (%sp)
+; CHECK-NEXT: move.l #0, (4,%sp)
+; CHECK-NEXT: jsr __mulsf3
+; CHECK-NEXT: move.l %d0, (%a2)
+; CHECK-NEXT: moveq #0, %d0
+; CHECK-NEXT: movem.l (8,%sp), %a2 ; 8-byte Folded Reload
+; CHECK-NEXT: adda.l #12, %sp
+; CHECK-NEXT: rts
+start:
+ %_58 = call float @float_arg(float 0.000000e+00)
+ %_60 = load float, ptr %inout, align 8
+ %_57 = fmul float 0.000000e+00, %_60
+ store float %_57, ptr %inout, align 8
+ ret float 0.000000e+00
+}
+
+define float @double_arg_test(ptr %inout) nounwind {
+; CHECK-LABEL: double_arg_test:
+; CHECK: ; %bb.0: ; %start
+; CHECK-NEXT: suba.l #12, %sp
+; CHECK-NEXT: movem.l %a2, (8,%sp) ; 8-byte Folded Spill
+; CHECK-NEXT: move.l #0, (4,%sp)
+; CHECK-NEXT: move.l #0, (%sp)
+; CHECK-NEXT: jsr double_arg
+; CHECK-NEXT: move.l (16,%sp), %a2
+; CHECK-NEXT: move.l (%a2), (%sp)
+; CHECK-NEXT: move.l #0, (4,%sp)
+; CHECK-NEXT: jsr __mulsf3
+; CHECK-NEXT: move.l %d0, (%a2)
+; CHECK-NEXT: moveq #0, %d0
+; CHECK-NEXT: movem.l (8,%sp), %a2 ; 8-byte Folded Reload
+; CHECK-NEXT: adda.l #12, %sp
+; CHECK-NEXT: rts
+start:
+ %_58 = call float @double_arg(double 0.000000e+00)
+ %_60 = load float, ptr %inout, align 8
+ %_57 = fmul float 0.000000e+00, %_60
+ store float %_57, ptr %inout, align 8
+ ret float 0.000000e+00
+}
More information about the llvm-commits
mailing list