[llvm] [AArch64] Combine vector FNEG+FMA into `FNML[A|S]` (PR #167900)
Benjamin Maxwell via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 28 03:48:26 PST 2025
================
@@ -427,3 +456,6 @@ entry:
%0 = tail call <7 x half> @llvm.fmuladd(<7 x half> %neg, <7 x half> %b, <7 x half> %neg1)
ret <7 x half> %0
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-SME: {{.*}}
+; CHECK-SVE: {{.*}}
----------------
MacDue wrote:
You should remove the CHECK-SME/SVE prefixes if they're not used (or expected to be the same).
https://github.com/llvm/llvm-project/pull/167900
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