[llvm] [X86] Add ISD::MULHS/MULHU v4i64/v8i64 lowering (PR #169819)

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git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/lib/Target/X86/X86ISelLowering.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 20b29f31c..889c8ce96 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1687,8 +1687,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
     setOperationAction(ISD::FDIV, MVT::v16f16, Expand);
 
     if (HasInt256) {
-      setOperationAction(ISD::MULHS,   MVT::v4i64, Custom);
-      setOperationAction(ISD::MULHU,   MVT::v4i64, Custom);
+      setOperationAction(ISD::MULHS, MVT::v4i64, Custom);
+      setOperationAction(ISD::MULHU, MVT::v4i64, Custom);
       setOperationAction(ISD::VSELECT, MVT::v32i8, Legal);
 
       // Custom legalize 2x32 to get a little better code.
@@ -1942,8 +1942,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
     setOperationAction(ISD::MUL, MVT::v32i16, HasBWI ? Legal : Custom);
     setOperationAction(ISD::MUL, MVT::v64i8,  Custom);
 
-    setOperationAction(ISD::MULHS, MVT::v8i64,  Custom);
-    setOperationAction(ISD::MULHU, MVT::v8i64,  Custom);
+    setOperationAction(ISD::MULHS, MVT::v8i64, Custom);
+    setOperationAction(ISD::MULHU, MVT::v8i64, Custom);
     setOperationAction(ISD::MULHU, MVT::v16i32, Custom);
     setOperationAction(ISD::MULHS, MVT::v16i32, Custom);
     setOperationAction(ISD::MULHS, MVT::v32i16, HasBWI ? Legal : Custom);

``````````

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https://github.com/llvm/llvm-project/pull/169819