[llvm] [RISCV] Implement RVV scheduling model for andes 45 series processor. (PR #167821)

[Min-Yih Hsu via llvm-commits]

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mshockwave wrote:

I assume you might share this code among many scheduling models in your codebases where `Andes45VLEN` and `Andes45DLEN` might be factored out with different values. But in this case they're always the same, could we just substitute this expression with 1?

https://github.com/llvm/llvm-project/pull/167821