[llvm] [RISCV] Implement RVV scheduling model for andes 45 series processor. (PR #167821)

[Min-Yih Hsu via llvm-commits]

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mshockwave wrote:

nit: could we use `defvar` here for `a` and `b`? The difference is that `defvar` is basically just "constexpr" in TableGen, while the way you declare `a` and `b` will add new fields into the TableGen record body.

ditto for other similar occurrences

https://github.com/llvm/llvm-project/pull/167821