[llvm] [RISCV][llvm] Preliminary P extension codegen support (PR #162668)

[Brandon Wu via llvm-commits]

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@@ -10426,6 +10530,26 @@ SDValue RISCVTargetLowering::lowerEXTRACT_VECTOR_ELT(SDValue Op,
     return DAG.getNode(RISCVISD::FMV_H_X, DL, EltVT, IntExtract);
   }
 
+  if (Subtarget.enablePExtCodeGen() && VecVT.isFixedLengthVector()) {
+    if (VecVT != MVT::v4i16 && VecVT != MVT::v2i16 && VecVT != MVT::v8i8 &&
+        VecVT != MVT::v4i8 && VecVT != MVT::v2i32)
+      return SDValue();
+    SDValue Extracted = DAG.getBitcast(XLenVT, Vec);
+    unsigned ElemWidth = EltVT.getSizeInBits();
+    if (auto *IdxC = dyn_cast<ConstantSDNode>(Idx)) {
+      unsigned Idx = IdxC->getZExtValue();
+      unsigned Shamt = Idx * ElemWidth;
+      if (Shamt > 0)
+        Extracted = DAG.getNode(ISD::SRL, DL, XLenVT,
+                                DAG.getConstant(Shamt, DL, XLenVT));
+    } else {
+      SDValue Shamt = DAG.getNode(ISD::MUL, DL, XLenVT, Idx,
+                                  DAG.getConstant(ElemWidth, DL, XLenVT));
+      Extracted = DAG.getNode(ISD::SRL, DL, XLenVT, Shamt);
+    }
+    return DAG.getNode(ISD::TRUNCATE, DL, EltVT, Extracted);
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4vtomat wrote:

Is it because I set legal type for operation action? so it always goes through op legalization.


https://github.com/llvm/llvm-project/pull/162668