[llvm] [CodeGen] Register-coalescer remat fix subreg liveness (PR #165662)

Vigneshwar Jayakumar via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 3 09:41:19 PST 2025


VigneshwarJ wrote:

the mir I wrote was ambiguous and as mentioned above has other problems. Updated the mir test.
The issue this ticket tries to address is
```llvm
48B	  %2:sreg_32 = S_MOV_B32 1
64B	  undef %3.sub0:sgpr_128 = COPY %2:sreg_32
..
128B	  %6:sgpr_128 = COPY killed %3:sgpr_128 (lanemask 0xF3  [128r, 464B:0))
144B	  %6.sub1:sgpr_128 = COPY killed %1:sreg_32_xm0_xexec (lanemask 0x0C [128r,128d:1))
..
464B	bb.2:
```

Here the coalescer remats to undef %3.sub0 = S_MOV_B32 1
And when it tries to remat 128B
		updated: 128B	undef %6.sub0:sgpr_128 = S_MOV_B32 1
		updated: 144B	%6.sub1:sgpr_128 = COPY %1:sreg_32_xm0_xexec
But the lanemask is still previous (lanemask 0xF3  [128r, 464B:0)) . This causes 

Because this is a new def with undef for subreg , the lanemask should be  (lanemask 0x03  [128r, 464B:0)), this is what this ticket fixes. 


https://github.com/llvm/llvm-project/pull/165662


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