[llvm] [AMDGPU][GlobalISel] Add register bank legalization for G_FADD (PR #163407)

[Petar Avramovic via llvm-commits]

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@@ -616,6 +616,24 @@ void RegBankLegalizeHelper::lowerSplitTo32(MachineInstr &MI) {
   MI.eraseFromParent();
 }
 
+void RegBankLegalizeHelper::lowerSplitTo16(MachineInstr &MI) {
+  Register Dst = MI.getOperand(0).getReg();
+  LLT DstTy = MRI.getType(Dst);
+  assert(DstTy == V2S16);
+  auto [Val0_Lo_32, Val0_Hi_32] = unpackAExt(MI.getOperand(1).getReg());
+  auto [Val1_Lo_32, Val1_Hi_32] = unpackAExt(MI.getOperand(2).getReg());
+  unsigned Opc = MI.getOpcode();
+  auto Flags = MI.getFlags();
+  auto Val0_Lo = B.buildTrunc(SgprRB_S16, Val0_Lo_32);
+  auto Val0_Hi = B.buildTrunc(SgprRB_S16, Val0_Hi_32);
+  auto Val1_Lo = B.buildTrunc(SgprRB_S16, Val1_Lo_32);
+  auto Val1_Hi = B.buildTrunc(SgprRB_S16, Val1_Hi_32);
+  auto Lo = B.buildInstr(Opc, {SgprRB_S16}, {Val0_Lo, Val1_Lo}, Flags);
+  auto Hi = B.buildInstr(Opc, {SgprRB_S16}, {Val0_Hi, Val1_Hi}, Flags);
+  B.buildMergeLikeInstr(Dst, {Lo.getReg(0), Hi.getReg(0)});
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petar-avramovic wrote:

```suggestion
  B.buildMergeLikeInstr(Dst, {Lo, Hi});
```

https://github.com/llvm/llvm-project/pull/163407