[llvm] [AMDGPU][GlobalISel] Add register bank legalization for G_FADD (PR #163407)

[Petar Avramovic via llvm-commits]

================
@@ -616,6 +616,24 @@ void RegBankLegalizeHelper::lowerSplitTo32(MachineInstr &MI) {
   MI.eraseFromParent();
 }
 
+void RegBankLegalizeHelper::lowerSplitTo16(MachineInstr &MI) {
+  Register Dst = MI.getOperand(0).getReg();
+  LLT DstTy = MRI.getType(Dst);
+  assert(DstTy == V2S16);
+  auto [Val0_Lo_32, Val0_Hi_32] = unpackAExt(MI.getOperand(1).getReg());
+  auto [Val1_Lo_32, Val1_Hi_32] = unpackAExt(MI.getOperand(2).getReg());
----------------
petar-avramovic wrote:

Small naming suggestion to keep these similar to surrounding code, use Op1 Op2 instead of Val0 and Val1
for example  Val0_Lo_32 -> Op0Lo32

https://github.com/llvm/llvm-project/pull/163407