[llvm] [AMDGPU] Support true16 spill restore with sram-ecc (PR #165320)

[Jay Foad via llvm-commits]

================
@@ -1863,6 +1873,15 @@ void SIRegisterInfo::buildSpillLoadStore(
       MIB.addImm(0); // swz
     MIB.addMemOperand(NewMMO);
 
+    if (FinalValueReg != ValueReg) {
+      // Extract 16-bit from the loaded 32-bit value.
+      ValueReg = getSubReg(ValueReg, AMDGPU::lo16);
----------------
jayfoad wrote:

Agreed. It is simpler the way you have it now.

https://github.com/llvm/llvm-project/pull/165320