[llvm] [AMDGPU] Support true16 spill restore with sram-ecc (PR #165320)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -1863,6 +1873,15 @@ void SIRegisterInfo::buildSpillLoadStore(
       MIB.addImm(0); // swz
     MIB.addMemOperand(NewMMO);
 
+    if (FinalValueReg != ValueReg) {
+      // Extract 16-bit from the loaded 32-bit value.
+      ValueReg = getSubReg(ValueReg, AMDGPU::lo16);
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rampitec wrote:

Technically I can even use the same SCRATCH_LOAD_SHORT_D16_SADDR_t16 as w/o sramecc, but I would need to chose lo16 or hi16 here. I do not think this is really needed.

https://github.com/llvm/llvm-project/pull/165320