[llvm] [LoongArch][NFC] Pre-commit tests for `xvextrins` (PR #164373)

[via llvm-commits]

https://github.com/zhaoqi5 created https://github.com/llvm/llvm-project/pull/164373

None

>From 4d0ddf22f144e5de6d42aac9631289762afbbdc1 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01 at loongson.cn>
Date: Tue, 21 Oct 2025 16:02:07 +0800
Subject: [PATCH] [LoongArch][NFC] Pre-commit tests for `xvextrins`

---
 .../ir-instruction/shuffle-as-xvextrins.ll    | 78 +++++++++++++++++++
 1 file changed, 78 insertions(+)
 create mode 100644 llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll

diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll
new file mode 100644
index 0000000000000..841f383e1bff8
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll
@@ -0,0 +1,78 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx %s -o - | FileCheck %s
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx %s -o - | FileCheck %s
+
+;; xvextrins.b
+define void @shufflevector_v32i8(ptr %res, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: shufflevector_v32i8:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI0_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI0_0)
+; CHECK-NEXT:    xvshuf.b $xr0, $xr1, $xr0, $xr2
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <32 x i8>, ptr %a
+  %vb = load <32 x i8>, ptr %b
+  %c = shufflevector <32 x i8> %va, <32 x i8> %vb, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 32, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 48>
+  store <32 x i8> %c, ptr %res
+  ret void
+}
+
+;; xvextrins.h
+define void @shufflevector_v16i16(ptr %res, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: shufflevector_v16i16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI1_0)
+; CHECK-NEXT:    xvld $xr1, $a1, %pc_lo12(.LCPI1_0)
+; CHECK-NEXT:    xvshuf.h $xr1, $xr0, $xr0
+; CHECK-NEXT:    xvst $xr1, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <16 x i16>, ptr %a
+  %vb = load <16 x i16>, ptr %b
+  %c = shufflevector <16 x i16> %va, <16 x i16> %vb, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 10, i32 13, i32 14, i32 15>
+  store <16 x i16> %c, ptr %res
+  ret void
+}
+
+;; xvextrins.w
+define void @shufflevector_v8i32(ptr %res, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: shufflevector_v8i32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI2_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI2_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %c = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 3, i32 9, i32 10, i32 11, i32 7, i32 13, i32 14, i32 15>
+  store <8 x i32> %c, ptr %res
+  ret void
+}
+
+;; xvextrins.w
+define void @shufflevector_v8f32(ptr %res, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: shufflevector_v8f32:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI3_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI3_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x float>, ptr %a
+  %vb = load <8 x float>, ptr %b
+  %c = shufflevector <8 x float> %va, <8 x float> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 0, i32 12, i32 13, i32 14, i32 4>
+  store <8 x float> %c, ptr %res
+  ret void
+}