[llvm] [WebAssembly] [Codegen] Add pattern for relaxed min max from fminimum/fmaximum over v4f32 and v2f64 (PR #162948)

[Sam Parker via llvm-commits]

================
@@ -1692,6 +1692,26 @@ defm SIMD_RELAXED_FMIN :
 defm SIMD_RELAXED_FMAX :
    RelaxedBinary<F64x2, int_wasm_relaxed_max, "relaxed_max", 0x110>;
 
+// Transform standard fminimum/fmaximum to relaxed versions
+// AddedComplexity ensures these patterns match before the standard MIN/MAX
+let AddedComplexity = 1 in {
+def : Pat<(v4f32 (fminimum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
----------------
sparker-arm wrote:

I feel like we should be able to use a different ISD node for these, as they are just as strict as our standard min/max.

AFAICT, we don't care about NaNs or signed zeros for our relaxed operations, so I would have thought we could lower both minnum and miniumnum instead?

https://github.com/llvm/llvm-project/pull/162948