[llvm] [RISCV][llvm] Preliminary P extension codegen support (PR #162668)
Brandon Wu via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 15 21:02:41 PDT 2025
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@@ -479,6 +490,24 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
ISD::FTRUNC, ISD::FRINT, ISD::FROUND,
ISD::FROUNDEVEN, ISD::FCANONICALIZE};
+ if (Subtarget.hasStdExtP()) {
+ // load/store are already handled by pattern matching
+ SmallVector<MVT, 2> VTs = {MVT::v2i16, MVT::v4i8};
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4vtomat wrote:
do we want `v4i16` or `v2i32`?
https://github.com/llvm/llvm-project/pull/162668
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