[llvm] [RISCV] Modify RegMask Settings of Scalar Library Functions to Reduce Spills (PR #163311)

[Craig Topper via llvm-commits]

topperc wrote:

> Hi, Thanks for your reply! I’d like to clarify that our change fully follows the calling convention.
> 
> First, CSR_ILP32D_LP64D_V_RegMask is based on CSR_ILP32D_LP64D_RegMask (scalar callee-saved registers) and only adds a subset of vector callee-saved registers (v1–v7, v24–v31), not all vector registers.
> 
> Second, all library functions comply with the ABI design and restore callee-saved registers upon exit — even scalar functions like memset and memcpy that internally use vector instructions.
> 
> Therefore, when the subtarget supports the V extension, making vector callee-saved registers available is valid. Additionally, we verified correctness on SPEC CPU2006 and encountered no problems.
> 
> Happy to continue the discussion :)
> 

What if the library code is compiled with gcc? Or an older version of clang/gcc that doesn't have this patch?

https://github.com/llvm/llvm-project/pull/163311