[llvm] [AMDGPU] siloadstoreopt generate REG_SEQUENCE with aligned operands (PR #162088)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> > Can you add the new test that produced the unaligned use? I'm not really sure how you ended up with this problem in the first place
> 
> similarly, wont be able to reproduce end-to-end as 

For the purposes of this PR, you don't need to. You should still add the pre-merge MIR here that induced the unaligned use after 




https://github.com/llvm/llvm-project/pull/162088