[llvm] [AMDGPU] siloadstoreopt generate REG_SEQUENCE with aligned operands (PR #162088)

[Janek van Oirschot via llvm-commits]

JanekvO wrote:

> Can you add the new test that produced the unaligned use? I'm not really sure how you ended up with this problem in the first place

It'll be similar to some of the tests I'm trying to add in #160547 (similarly, wont be able to reproduce end-to-end as I reverted #154115 for now as I try fixing these vgpr alignment issues)
I'll also enable gfx942/gfx90a for some of the buffer-merge tests as these would end up with crashes/errors. For example, `merge-buffer.mir` will crash/error if run for align2 constrained targets like gfx942/gfx90a: https://godbolt.org/z/eh8znhE1E

https://github.com/llvm/llvm-project/pull/162088