[llvm] [AArch64][llvm] Reject assembler for invalid TLBIP instructions (PR #162090)

[Jonathan Thackray via llvm-commits]

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@@ -830,131 +851,151 @@ class TLBIEntry<string name, bits<3> op1, bits<4> crn, bits<4> crm,
   code RequiresStr = [{ { }] # !interleave(Requires # ExtraRequires, [{, }]) # [{ } }];
 }
 
+def TLBIPTable : GenericTable {
+  let FilterClass = "TLBIPEntry";
+  let CppTypeName = "TLBIP";
+  let Fields = ["Name", "Encoding", "NeedsReg", "RequiresStr"];
+  let PrimaryKey = ["Encoding"];
+  let PrimaryKeyName = "lookupTLBIPByEncoding";
+}
+
 def TLBITable : GenericTable {
   let FilterClass = "TLBIEntry";
   let CppTypeName = "TLBI";
   let Fields = ["Name", "Encoding", "NeedsReg", "RequiresStr"];
-
   let PrimaryKey = ["Encoding"];
   let PrimaryKeyName = "lookupTLBIByEncoding";
 }
 
+def lookupTLBIPByName : SearchIndex {
+  let Table = TLBIPTable;
+  let Key = ["Name"];
+}
+
 def lookupTLBIByName : SearchIndex {
   let Table = TLBITable;
   let Key = ["Name"];
 }
 
-multiclass TLBI<string name, bits<3> op1, bits<4> crn, bits<4> crm,
+multiclass TLBI<string name, TLBImode mode, bits<3> op1, bits<4> crn, bits<4> crm,
----------------
jthackray wrote:

Yes, fair enough. Originally I was hoping tablegen might have some kind of enum, which it doesn't, so I sort of emulated them. I'll go for a single bit instead and make it clear from the name.

https://github.com/llvm/llvm-project/pull/162090