[llvm] [LV] Avoid bailing on some SCEVUnknowns in uniformity-rew (PR #161292)

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 30 00:58:18 PDT 2025


https://github.com/fhahn commented:

> An SCEVUnknown is marked unanalyzable, as a load or store could be hiding a SCEVAddRec underneath, making it non-uniform. However, there is no problem with BinOps and CastOps: hence, permit them in the SCEVAddRecForUniformityRewriter.

Hmm, but couldn't the operand of those ops be itself a SCEVUnknown which is non-uniform? I think the would have to prove uniformity for the operands as well. Perhaps that could be done separately if there are motivating cases?

(For loads, just proving that the address is uniform is not enough, we also need to ensure there are no writes to the address in the loop)

https://github.com/llvm/llvm-project/pull/161292


More information about the llvm-commits mailing list