[llvm] [X86] AMD Zen 5 Scheduler Descriptions (PR #131780)

[Simon Pilgrim via llvm-commits]

RKSimon wrote:

> What still needs to be done to get this PR merged?

The znver4 model needs to be in much better shape - a large number of port assignments, latencies and throughputs do not match AMD, uops.info or Agner numbers - this znver5 model was mainly a copy+paste of the znver4 model, including many of those mistakes.

https://github.com/llvm/llvm-project/pull/131780