[llvm] [CodeGen] Fix performance regression introduced in b05101b (PR #161313)

[Alexander Richardson via llvm-commits]

================
@@ -367,11 +367,11 @@ def aarch64mfp8 : ValueType<8,  253>;  // 8-bit value in FPR (AArch64)
 def c64 : VTCheriCapability<64, 254>;   // 64-bit CHERI capability value
 def c128 : VTCheriCapability<128, 255>; // 128-bit CHERI capability value
 
+let isNormalValueType = false in {
 // Pseudo valuetype mapped to the current CHERI capability pointer size.
 // Should only be used in TableGen.
 def cPTR : VTAny<503>;
----------------
arichardson wrote:

Unrelated to this change but I wonder if we should we also renumber the other values and move this next to iPTR?

https://github.com/llvm/llvm-project/pull/161313