[llvm] [CodeGen] Fix performance regression introduced in b05101b (PR #161313)
Alexander Richardson via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 29 21:49:54 PDT 2025
https://github.com/arichardson created https://github.com/llvm/llvm-project/pull/161313
The isNormalValueType = false flag was not set for this pseudo value
type, which caused significant size increases for some classes: the
size of the TargetLoweringBase class to 1.5 MB, because the size of
that class is quadratic in MVT::VALUETYPE_SIZE, and this commit
increased that from 256 to 504.
Reported by: abadams
Fixes: b05101b ("[TableGen, CodeGen, CHERI] Add support for the cPTR wildcard value type.")
>From df83da29f2545093d909dc6c857789a1ee8f47af Mon Sep 17 00:00:00 2001
From: Alex Richardson <alexrichardson at google.com>
Date: Mon, 29 Sep 2025 21:49:25 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
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Created using spr 1.3.8-beta.1
---
llvm/include/llvm/CodeGen/ValueTypes.td | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/include/llvm/CodeGen/ValueTypes.td b/llvm/include/llvm/CodeGen/ValueTypes.td
index 9ea127dd15943..300addd7d4daf 100644
--- a/llvm/include/llvm/CodeGen/ValueTypes.td
+++ b/llvm/include/llvm/CodeGen/ValueTypes.td
@@ -367,11 +367,11 @@ def aarch64mfp8 : ValueType<8, 253>; // 8-bit value in FPR (AArch64)
def c64 : VTCheriCapability<64, 254>; // 64-bit CHERI capability value
def c128 : VTCheriCapability<128, 255>; // 128-bit CHERI capability value
+let isNormalValueType = false in {
// Pseudo valuetype mapped to the current CHERI capability pointer size.
// Should only be used in TableGen.
def cPTR : VTAny<503>;
-let isNormalValueType = false in {
def token : ValueType<0, 504>; // TokenTy
def MetadataVT : ValueType<0, 505> { // Metadata
let LLVMName = "Metadata";
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