[llvm] [InstCombine] Rotate transformation port from SelectionDAG to InstCombine (PR #160628)

[Min-Yih Hsu via llvm-commits]

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@@ -2405,6 +2405,24 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
               matchBSwapOrBitReverse(*II, /*MatchBSwaps*/ true,
                                      /*MatchBitReversals*/ true))
         return BitOp;
+
+      // R = fshl(X, X, C2)
+      // fshl(R, R, C1) --> fshl(X, X, (C1 + C2) % bitsize)
+      Value *InnerOp0;
+      Value *InnerOp1;
+      Constant *ShAmtInnerC;
+      if (match(Op0, m_FShl(m_Value(InnerOp0), m_Value(InnerOp1),
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mshockwave wrote:

I believe you can use `m_Deferred` here: https://github.com/llvm/llvm-project/blob/157b81a910efadf7fa08f6958ca7f7e2200c0ca8/llvm/include/llvm/IR/PatternMatch.h#L968

https://github.com/llvm/llvm-project/pull/160628