[llvm] [ARM] LHS and RHS should be frozen for LowerCMP (PR #159993)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-arm

Author: AZero13 (AZero13)

<details>
<summary>Changes</summary>

LHS and RHS are used multiple times.

---
Full diff: https://github.com/llvm/llvm-project/pull/159993.diff


1 Files Affected:

- (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+3) 


``````````diff
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 9052cbfa89deb..9905a4457f35b 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -10479,6 +10479,9 @@ SDValue ARMTargetLowering::LowerCMP(SDValue Op, SelectionDAG &DAG) const {
 
   // Special case for Thumb1 UCMP only
   if (!IsSigned && Subtarget->isThumb1Only()) {
+    LHS = DAG.getFreeze(LHS);
+    RHS = DAG.getFreeze(RHS);
+
     // For Thumb unsigned comparison, use this sequence:
     // subs r2, r0, r1   ; r2 = LHS - RHS, sets flags
     // sbc r2, r2        ; r2 = r2 - r2 - !carry

``````````

</details>


https://github.com/llvm/llvm-project/pull/159993