[llvm] [AMDGPU] Support image atomic no return instructions (PR #150742)

[Harrison Hao via llvm-commits]

harrisonGPU wrote:

> While the entries for new column for atomic instructions in ImageDimIntrinsicInfo are fine:
> 
> ```
> { Intrinsic::amdgcn_image_atomic_add_1d, IMAGE_ATOMIC_ADD, IMAGE_ATOMIC_ADD_NORTN, ...
> ```
> 
> this now creates strange entries for existing sample opcodes that have _nortn versions
> 
> ```
> { Intrinsic::amdgcn_image_sample_1d,       IMAGE_SAMPLE,       IMAGE_SAMPLE, ...
> { Intrinsic::amdgcn_image_sample_1d_nortn, IMAGE_SAMPLE_nortn, IMAGE_SAMPLE_nortn, ...
> ```
> 
> I understand that we are not introducing void `@llvm.amdgcn.atomic.nortn.*` intrinsics so the way these are used are different and sample is not supposed to rely on it, but it can cause confusion. Would it make more sense to add another field to `MIMGInfoTable` instead for whether it is a noreturn version or not? It would then be picked with `getMIMGOpcode` just like any other variant.

Thanks a lot, The no-return image sample entries aren’t introduced by this PR. I already generate the tables separately:
```
foreach intr = AMDGPUImageDimIntrinsics in {
  def : ImageDimIntrinsicInfo<intr>;
}

foreach intr = AMDGPUImageDimAtomicIntrinsics in {
  def : ImageDimAtomicIntrinsicInfo<intr>;
}
```
This means image sample intrinsics and image atomic intrinsics are generated from different lists.

https://github.com/llvm/llvm-project/pull/150742