[llvm] [RISCV] Add MVendorID, MArchID, and MImpID for sifive-p550. (PR #159465)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 17 20:26:47 PDT 2025


https://github.com/wangpc-pp commented:

Please add a test in `clang/test/CodeGen/RISCV/builtin-cpu-is.c`.

https://github.com/llvm/llvm-project/pull/159465


More information about the llvm-commits mailing list