[llvm] [RISCV] Add isel for bitcasting between bfloat and half types (PR #158828)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+Zfhmin,+Zfbfmin \
+; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+Zfhmin,+Zfbfmin \
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topperc wrote:

I figured we must since the test passed. But it's inconsistent with the majority of our tests.

https://github.com/llvm/llvm-project/pull/158828