[clang] [llvm] RISCV: the builtins support for MIPS RV64 P8700 execution control . (PR #159246)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,20 @@
+//===- IntrinsicsRISCVXMIPS.td - Defines MIPS intrinsics -------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the MIPS specific intrinsics for RISCV.
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topperc wrote:

```suggestion
// This file defines all of the MIPS specific intrinsics for RISC-V.
```

https://github.com/llvm/llvm-project/pull/159246