[clang] [llvm] RISCV: the builtins support for MIPS RV64 P8700 execution control . (PR #159246)

[Craig Topper via llvm-commits]

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+//===- IntrinsicsRISCVXMIPS.td - Defines MIPS intrinsics -------*- tablegen -*-===//
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topperc wrote:

Limit line to 80 columns

https://github.com/llvm/llvm-project/pull/159246