[llvm] [TableGen] Add mapping from processor ID to resource index for packetizer (PR #158182)

Haohai Wen via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 15 01:30:39 PDT 2025


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@@ -266,6 +266,38 @@ void DFAPacketizerEmitter::emitForItineraries(
   }
   OS << "  " << ScheduleClasses.size() << "\n};\n\n";
 
+  // Output the mapping from proc ID to ResourceIndexStart
+  Idx = 1;
+  OS << "int " << TargetName << DFAName
+     << "GetResourceIndex(unsigned ProcID) { \n"
+     << "  static const unsigned " << TargetName << DFAName
+     << "ProcIdToProcResourceIdxTable[][2] = {\n";
+  for (const CodeGenProcModel *Model : ProcModels) {
+    OS << "    { " << Model->Index << ",  " << Idx++ << " }, // "
+       << Model->ModelName << "\n";
+  }
+  OS << "  };\n"
+     << "  unsigned Mid;\n"
+     << "  unsigned Start = 0;\n"
+     << "  unsigned End = " << ProcModels.size() << ";\n"
+     << "  while (Start < End) {\n"
+     << "  Mid = Start + (End - Start) / 2;\n"
+     << "  if (ProcID == " << TargetName << DFAName
+     << "ProcIdToProcResourceIdxTable[Mid][0]) {\n"
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HaohaiWen wrote:

llvm::lower_bound/upper_bound?

https://github.com/llvm/llvm-project/pull/158182


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