[llvm] [AMDGPU] Fix vector legalization for bf16 valu ops (PR #158439)

[Matt Arsenault via llvm-commits]

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@@ -607,6 +607,8 @@ InstructionCost GCNTTIImpl::getArithmeticInstrCost(
   case ISD::FSUB:
     if (ST->hasPackedFP32Ops() && SLT == MVT::f32)
       NElts = (NElts + 1) / 2;
+    if (ST->hasBF16PackedInsts() && SLT == MVT::bf16)
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arsenm wrote:

F16 case here missing is probably a bug. We should also probably be expressing this in terms of a legality query on the 2 x element 

https://github.com/llvm/llvm-project/pull/158439