[llvm] [InstCombine] Canonicalize active lane mask params (PR #158065)

[David Sherwood via llvm-commits]

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@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+define <vscale x 4 x i1> @rewrite_range_nxv4i1() {
+; CHECK-LABEL: define <vscale x 4 x i1> @rewrite_range_nxv4i1() {
+; CHECK-NEXT:    [[MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 0, i32 3)
+; CHECK-NEXT:    ret <vscale x 4 x i1> [[MASK]]
+;
+  %mask = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 1, i32 4)
+  ret <vscale x 4 x i1> %mask
+}
+
+define <vscale x 16 x i1> @rewrite_range_nxv16i1() {
+; CHECK-LABEL: define <vscale x 16 x i1> @rewrite_range_nxv16i1() {
+; CHECK-NEXT:    [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 0, i64 7)
+; CHECK-NEXT:    ret <vscale x 16 x i1> [[MASK]]
+;
+  %mask = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 123123, i64 123130)
+  ret <vscale x 16 x i1> %mask
+}
+
+define <vscale x 16 x i1> @rewrite_range_nxv16i1_i128() {
+; CHECK-LABEL: define <vscale x 16 x i1> @rewrite_range_nxv16i1_i128() {
+; CHECK-NEXT:    [[MASK:%.*]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i128(i128 0, i128 10)
+; CHECK-NEXT:    ret <vscale x 16 x i1> [[MASK]]
+;
+  %mask = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i128(i128 18446744073709551616, i128 18446744073709551626)
+  ret <vscale x 16 x i1> %mask
+}
+
+define <vscale x 4 x i1> @bail_lhs_is_zero() {
+; CHECK-LABEL: define <vscale x 4 x i1> @bail_lhs_is_zero() {
+; CHECK-NEXT:    [[MASK:%.*]] = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 0, i32 4)
+; CHECK-NEXT:    ret <vscale x 4 x i1> [[MASK]]
+;
+  %mask = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 0, i32 4)
+  ret <vscale x 4 x i1> %mask
+}
+
+define <vscale x 4 x i1> @lhs_gt_rhs() {
+; CHECK-LABEL: define <vscale x 4 x i1> @lhs_gt_rhs() {
+; CHECK-NEXT:    ret <vscale x 4 x i1> zeroinitializer
+;
+  %mask = call <vscale x 4 x i1> @llvm.get.active.lane.mask.nxv4i1.i32(i32 5, i32 4)
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david-arm wrote:

I think these last two tests are already covered by the other constant folding patch you landed recently, so perhaps there is no need to add them again here?

https://github.com/llvm/llvm-project/pull/158065