[llvm] [AArch64][SME] Refactor MachineSMEABI pass state (NFCI) (PR #156674)
Gaëtan Bossu via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 11 05:17:30 PDT 2025
================
@@ -260,55 +322,27 @@ struct MachineSMEABI : public MachineFunctionPass {
void restorePhyRegSave(PhysRegSave const &RegSave, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, DebugLoc DL);
- /// Get or create a TPIDR2 block in this function.
- TPIDR2State getTPIDR2Block();
-
- Register getAgnosticZABufferPtr();
-
private:
- /// Contains the needed ZA state (and live registers) at an instruction.
- struct InstInfo {
- ZAState NeededState{ZAState::ANY};
- MachineBasicBlock::iterator InsertPt;
- LiveRegs PhysLiveRegs = LiveRegs::None;
- };
-
- /// Contains the needed ZA state for each instruction in a block.
- /// Instructions that do not require a ZA state are not recorded.
- struct BlockInfo {
- ZAState FixedEntryState{ZAState::ANY};
- SmallVector<InstInfo> Insts;
- LiveRegs PhysLiveRegsAtEntry = LiveRegs::None;
- LiveRegs PhysLiveRegsAtExit = LiveRegs::None;
- };
-
- // All pass state that must be cleared between functions.
- struct PassState {
- SmallVector<BlockInfo> Blocks;
- SmallVector<ZAState> BundleStates;
- std::optional<TPIDR2State> TPIDR2Block;
- std::optional<MachineBasicBlock::iterator> AfterSMEProloguePt;
- Register AgnosticZABufferPtr = AArch64::NoRegister;
- LiveRegs PhysLiveRegsAfterSMEPrologue = LiveRegs::None;
- } State;
----------------
gbossu wrote:
🚀
https://github.com/llvm/llvm-project/pull/156674
More information about the llvm-commits
mailing list