[llvm] [AArch64][SME] Refactor MachineSMEABI pass state (NFCI) (PR #156674)
Gaƫtan Bossu via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 11 05:17:30 PDT 2025
================
@@ -110,6 +110,65 @@ struct PhysRegSave {
Register X0Save = AArch64::NoRegister;
};
+/// Contains the needed ZA state (and live registers) at an instruction.
+struct InstInfo {
+ ZAState NeededState{ZAState::ANY};
+ MachineBasicBlock::iterator InsertPt;
+ LiveRegs PhysLiveRegs = LiveRegs::None;
+};
+
+/// Contains the needed ZA state for each instruction in a block. Instructions
+/// that do not require a ZA state are not recorded.
+struct BlockInfo {
+ ZAState FixedEntryState{ZAState::ANY};
+ SmallVector<InstInfo> Insts;
+ LiveRegs PhysLiveRegsAtEntry = LiveRegs::None;
+ LiveRegs PhysLiveRegsAtExit = LiveRegs::None;
+};
+
+/// Contains the needed ZA state information for all blocks within a function.
+struct FunctionInfo {
+ SmallVector<BlockInfo> Blocks;
+ std::optional<MachineBasicBlock::iterator> AfterSMEProloguePt;
+ LiveRegs PhysLiveRegsAfterSMEPrologue = LiveRegs::None;
+};
+
+/// State/helpers that is only needed when emitting code to handle
+/// saving/restoring ZA.
+struct EmitContext {
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gbossu wrote:
Nit: Just make it a class?
https://github.com/llvm/llvm-project/pull/156674
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