[llvm] [LLVM] Insert IMPLICIT_DEF for a register sequence if any operand is undef (PR #158000)

[Abhinav Garg via llvm-commits]

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@@ -1998,9 +1999,17 @@ void TwoAddressInstructionImpl::eliminateRegSequence(
                   .valueOut();
     }
   }
-
+  for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2)
+    if (MI.getOperand(i).isReg() && MI.getOperand(i).isUndef()) {
+      // Insert the IMPLICIT_DEF on dst register.
+      MachineInstr *DefMI =
+          BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
+                  TII->get(TargetOpcode::IMPLICIT_DEF), DstReg);
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abhigargrepo wrote:

Will it matter in the terms of performance?
I mean, this patch will first insert IMPLICIT_DEF for the whole tuple and then next instruction will override the defined sub parts leaving the other parts as IMPLICIT_DEF.

https://github.com/llvm/llvm-project/pull/158000