[llvm] [LLVM] Insert IMPLICIT_DEF for a register sequence if any operand is undef (PR #158000)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 10 23:51:33 PDT 2025
================
@@ -1998,9 +1999,17 @@ void TwoAddressInstructionImpl::eliminateRegSequence(
.valueOut();
}
}
-
+ for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2)
+ if (MI.getOperand(i).isReg() && MI.getOperand(i).isUndef()) {
+ // Insert the IMPLICIT_DEF on dst register.
+ MachineInstr *DefMI =
+ BuildMI(*MI.getParent(), MI, MI.getDebugLoc(),
+ TII->get(TargetOpcode::IMPLICIT_DEF), DstReg);
----------------
arsenm wrote:
This is emitting a full register def for each input. You only need to insert a subregister def for this particular subregister from the reg_sequence input
i.e., something like
```
BuildMI(IMPLICIT_DEF)
.addDef(DstReg, 0, MI.getOperand(I + 1).getSubReg())
```
https://github.com/llvm/llvm-project/pull/158000
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