[llvm] [AArch64] Combine signext_inreg of setcc(... != splat(0)) (PR #157665)
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 10 02:48:35 PDT 2025
================
@@ -26097,6 +26097,17 @@ static SDValue performSetCCPunpkCombine(SDNode *N, SelectionDAG &DAG) {
return SDValue();
}
+static bool isSignExtInReg(const SDValue &V) {
+ if (V.getOpcode() != AArch64ISD::VASHR ||
----------------
david-arm wrote:
I'm hoping that we can encourage all paths into a canonical form that requires a single DAG combine. Your PR may effectively be doing that, just at the very last DAG combiner pass.
https://github.com/llvm/llvm-project/pull/157665
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